COUT,LNM≥ ΔIL

8⋅FSW⋅ΔVOUT,PP,LNM

(8)

In case of light load and LCM working mode, the theoretical output voltage ripple is estimated by:

ΔVOUT,PP,LCM=L∙ISKIP2

2⋅COUT∙ VIN

VOUT∙ VIN−VOUT

(9)

The output capacitor selection is important also to guarantee the control loop stability.

COUT,BW≥ 0.8 A

FBW,MAX⋅VOUT

(10)

In the peak current mode architecture, working in LNM, there is a close relationship between the programmed

inductor peak current and the error amplifier input error (i.e. the difference between the output voltage sensed on

bandwidth:

∆VOUT,LTR≈ ∆IOUT

2π∙FBW⋅COUT

(11)

The L7983 implements a fixed integrated compensation network so the output capacitor selection, as highlighted

by Eq. (10), directly impacts the system bandwidth and, at the end, also the expected load transient performance

as described by Eq. (11).

The above listed design suggestions are summarized in Table 8 below which considers the most common voltage

conversions.

L [µH]

Note

1.5

200

100

22

1.8

43

56

VBIAS = GND

500

33

10

5.6

1000

22

4.7

0

3.3

200

220

10

1.8

180

62

500

68

4.7

5.6

1000

47

2.2

0

1500

22

2.2

18

5

200

330

6.8

1.8

300

62

500

100

3.3

5.6

1000

47

2.2

0

2200

22

2.2

56

12

200

330

3.3

1.8

510

39

VBIAS = VOUT

500

150

2.2

5.6

1000

68

1

0

2200

33

1

56

5.7.4

Layout considerations

The PCB layout of the switching DC-DC regulators minimizes the noise injected in high impedance nodes and

interference generated by the high current switching loops.

L7983

Application design guidelines

DS13354 - Rev 1

page 24/43