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STM32L552CEU6PTR 数据表(PDF) 274 Page - STMicroelectronics |
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STM32L552CEU6PTR 数据表(HTML) 274 Page - STMicroelectronics |
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274 / 340 page  Electrical characteristics STM32L552xx 274/340 DS12737 Rev 6 Figure 50. SPI timing diagram - master mode 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. SAI characteristics Unless otherwise specified, the parameters given in Table 130 for SAI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized inTable 27: General operating conditions, with the following configu- ration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD Refer to Section 5.3.15: I/O port characteristics for more details on the input/output alternate function characteristics (CK,SD,FS). ai14136c CPHA= 0 MOSI OUTPUT MISO INP UT CPHA= 0 LSB OUT LSB IN CPOL=0 CPOL=1 B I T1 OUT NSS input tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) th(MI) High CPHA=1 CPHA=1 CPOL=0 CPOL=1 tsu(MI) tv(MO) th(MO) MSB IN BIT6 IN MSB OUT |
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