MODEL: AD2LC

AD2LC SPECIFICATIONS

ES-1388 Rev.14 Page 6/7

https://www.m-system.co.jp/

SCHEMATIC CIRCUITRY & CONNECTION DIAGRAM

Low Drift

Amplifier

Base Socket

U(+)

V(–)

POWER

7

8

1

2

4

5

Isolation

6

3

9

OUTPUT

Digital

Computation

Circuit

PL1

(POL)

DATA

ITEM

PL2

(HOLD)

Low Drift

DC Volt.

Stabilizer

CONTACT

INPUT (Di)

10

11

STRAIN

GAUGE

+

–

+

–

+

–

INPUT

EXC.

■ Connection Examples

AD2LC

26-pin

CONNECTOR

H : 4.5V or more

L : 0.5V or less

OUTPUT

COM (-)

AD2LC

26-pin

CONNECTOR

Max. collector-emitter voltage : 30V DC

Max. collector current : 30mA

Saturation voltage : ≤ 1.1V DC

OUTPUT

COM (-)

LOAD

• OPEN COLLECTOR

• CMOS LEVEL (5V-CMOS)

For inductive load, connect

a spark quenching diode at

load side.

OUTPUT CONNECTOR (26-pin)

22

1

PIN NO.

ASSIGNMENT

PIN NO.

ASSIGNMENT

1

17

COM

2

18

COM

3

19

OVF

4

20

POL

5

21

DAV

6

7

23

COM

8

24

COM

9

25

No connection

10

26

No connection

11

12

13

14

15

16

PIN NO.

ASSIGNMENT

PIN NO.

ASSIGNMENT

1

17

COM

2

18

COM

3

19

OVF

4

20

POL

5

21

DAV

6

22

1

7

23

COM

8

24

COM

9

25

No connection

10

26

No connection

11

12

13

14

15

16

*1. HOLD signal is for input, the others are for output.

Note: With the number of bits set to 14 (or 12, 10, 8) with ITEM 20, Pin No. 1 – 14 (or 1 – 12, 1 – 10, 1 – 8) are valid.