MODEL: AD2LC

AD2LC SPECIFICATIONS

ES-1388 Rev.14 Page 2/7

https://www.m-system.co.jp/

• etc.

For detailed information, refer to the instruction manual.

■DISPLAY

LED: 7 mm (.28") 7 segment, red

Number of display digits: 4 digits for DATA display; 2 digits

for ITEM display

PV indication: Output signal in engineering unit

Overrange indication: LEDs blinking

Power saving mode: Displays turn off if the keys are

untouched for a preset time period

PL1 (POL) LED: Red LED turns on at negative polarity.

PL2 (HOLD) LED: Red LED turns on at HOLD.

INPUT SPECIFICATIONS

■ Strain Gauge Input

• Strain Gauge

Sensor sensitivity setting

S1: 0.010 - 3.000mV/V

S2: 0.010 - 9.999mV/V

S3: 0.10 - 30.00mV/V

Sensor sensitivity setting min. step:

S1: 0.001 mV/V

S2: 0.001 mV/V

S3: 0.01 mV/V

Default setting:

S1: 3.000 mV/V

S2: 9.999 mV/V

S3: 30.00 mV/V

Rated output from strain gauge:

S1: -30.00 – +30.00 mV, span 1.00 – 30.00 mV

S2: -99.99 – +99.99 mV, span 3.00 – 99.99 mV

S3: -300.0 – +300.0 mV, span 10.0 – 300.0 mV

Input voltage setting min. step:

S1: 0.01 mV

S2: 0.01 mV

S3: 0.1 mV

Note: Consult factory for use with a compression/tension

load cells.

• Excitation: 0.1 – 12.0 V adjustable (0.1 V increments)

Maximum current: 30 mA

Default setting: 1.0 V

■ Contact Input: TTL level (5V-CMOS level), open collector

or dry contact (detecting voltage: approx. 5 V, saturation

voltage: ≤ 1 V, sink current: 0.5 mA)

■ Hold Input: TTL level (5 V - CMOS level)

Commands to stop data renewal;

Choose from below:

Hold with low or short

Hold with high or open

(detecting voltage: approx. 5 V, saturation voltage: ≤ 1 V,

sink current: 0.5 mA)

OUTPUT SPECIFICATIONS

■ Output Code: Code, logic and scaling are user-selectable.

BCD with polarity (Settable range: -9999 - 9999)

Binary with polarity (Settable range: -7FFF - 7FFF)

Offset binary (Settable range: 0000 - FFFF)

Two’s complement (Settable range: 8000 - 7FFF)

Reflected binary (Settable range: 0000 - FFFF)

Output code, logic, scaling are settable.

■ Available number of bits

Selectable from 8, 10, 12, 14, 16 bits

■ Output Level

• Open Collector

Max. collector-emitter voltage: 30 V DC

Max. collector current: 30 mA

Saturation voltage: ≤1.1 V

Common: Negative

• CMOS Level

H output: ≥ 4.5 V DC

L output: ≤ 0.5 V DC

Common: Negative

■ POL output (Polarity): Same logic and level as for the

output code; logic user-selectable

■ OVF output (Overflow): Same logic and level as for the

output code; logic user-selectable

■ DAV output (Data available): Same level as for the output

code; logic user-selectable

INSTALLATION

Power consumption

•AC: Approx. 10 VA

•DC: Approx. 7 W (300 mA at 24 V)

Operating temperature: -5 to +55°C (23 to 131°F)

Operating humidity: 30 to 90 %RH (non-condensing)

Mounting: Surface or DIN rail

Weight: 450 g (0.99 lb)

PERFORMANCE in percentage of span

Accuracy: ±0.1 %

Temp. coefficient: ±0.015 %/°C (±0.008 %/°F) of max. span

Resolution: 16 bits

Response time: ≤ 1.5 sec. (0 – 90 %)

(Update period is less than or equal to 0.3 seconds. The

update pauses by auto compensation for approx. 0.8

seconds at every 5 or 6 seconds. Response time should

include that time.)

Excitation: Set value ±150 mV

Line voltage effect: ±0.1 % over voltage range

Insulation resistance: ≥ 100 MΩ with 500 V DC

Dielectric strength: 2000 V AC @ 1 minute

(input to output to power)

2000 V AC @ 1 minute