ADRF5045

Data Sheet

Rev. A | Page 10 of 14

THEORY OF OPERATION

The ADRF5045 requires a positive supply voltage applied to the

VDD pin and a negative supply voltage applied to the VSS pin.

Bypassing capacitors are recommended on the supply lines to

minimize RF coupling.

The ADRF5045 incorporates a driver to perform logic functions

internally and to provide the user with the advantage of a

simplified control interface. The driver features two digital

control input pins (V1 and V2) that control the state of the RF

paths. Depending on the logic level applied to the V1 and V2

pins, one RF path is in an insertion loss state, while the other

three paths are in an isolation state (see Table 5). The insertion

loss path conducts the RF signal equally well in both directions

between the RF throw port and the RF common port, and the

isolation paths provides high loss between the RF throw ports

terminated to internal 50 Ω resistors and the insertion loss

path.

The ideal power-up sequence for the ADRF5045 is as follows:

1. Connect GND.

2. Power up VDD and VSS. Powering up VSS after VDD

avoids current transients on VDD during ramp-up.

3. Apply the digital control inputs, V1 and V2. Applying

the digital control inputs before the VDD supply may

inadvertently forward bias and damage the internal ESD

protection structures. In such a case, use a series 1 kΩ

resistor to limit the current flowing in to the control pin.

If the control pins are not driven to a valid logic state (for

example, if the controller output is in a high impedance

state) after VDD is powered up, it is recommended to use

pull-up and pull-down resistors.

4. Apply an RF input signal. The design is bidirectional. The

RF input signal can be applied to the RFC port, while the

RF throw ports are outputs, or vice versa. The RF ports are

dc-coupled to 0 V, and no dc blocking is required at the RF

ports when the RF line potential is equal to 0 V.

The ideal power-down sequence is the reverse order of the

power-up sequence.

Table 5. Control Voltage Truth Table

Digital Control Input

RF Paths

V1

V2

RF1 to RFC

RF2 to RFC

RF3 to RFC

RF4 to RFC

Low

Low

Insertion loss (on)

Isolation (off)

Isolation (off)

Isolation (off)

High

Low

Isolation (off)

Insertion loss (on)

Isolation (off)

Isolation (off)

Low

High

Isolation (off)

Isolation (off)

Insertion loss (on)

Isolation (off)

High

High

Isolation (off)

Isolation (off)

Isolation (off)

Insertion loss (on)