FUSB3307 datasheet(8/21 Pages) ONSEMI

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FUSB3307

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Table 4. ELECTRICAL CHARACTERISTICS VCC = 5 V, TJ = −40°C to 125°C unless otherwise specified.

Parameter

Unit

Max

Typ

Min

Symbol

Test Conditions

CONSTANT VOLTAGE SENSING SECTION

VFB Reference Voltage at 5.0 V

(Power−on reset, default)

VCC = 5.0 V, VCS = 0 V

VCVR−5.0V

0.485

0.500

0.515

VFB Reference Voltage at 9 V

VCC = 9 V, VCS = 0 V

VCVR−9V

0.873

0.900

0.927

VFB Reference Voltage at 12 V

VCC = 12 V, VCS = 0 V

VCVR−12V

1.164

1.200

1.236

VFB Reference Voltage at 15 V

VCC = 15 V, VCS = 0 V

VCVR−15V

1.455

1.500

1.545

VFB Reference Voltage at 20 V

VCC = 20 V, VCS = 0 V

VCVR−20V

1.940

2.000

2.060

VFB Reference Voltage of 20 mV step

DVCC = 20 mV, VCS = 0 V

VCVR−STEP−20mV

1.940

2.000

2.060

FEEDBACK SECTION

CATH Pin Sink Current (Note 5)

Minimum guaranteed sink current ex-

pected from CATH pin

ICATH−Sink

DISCHARGE SECTION

VBUS to GND leakage resistance when

VBUS is not being sourced

GATE = 0 V

RDISC−BUS

72.4

155

VCC Pin Sink Current when discharging

(Note 5)

Discharging current on VCC after a

fault has triggered at VCC = 20 V

IVCC −Sink

170

DISC Pin Sink Current when discharging

(Note 5)

Discharging current on DISC during a

voltage transition at VCC = 20 V,

IOUT < ICS−EN−DSCG

IDISC −Sink

250

Discharge Time (Note 5)

VBUS voltage transition step (VSTEP)

v 0.5 V, Final VBUS > 13 V,

IOUT < ICS−EN−DSCG

tDISC1

Discharge Time (Note 5)

VSTEP v 0.5 V, Final VBUS < 13 V,

IOUT < ICS−EN−DSCG

tDISC2

Discharge Time (Note 5)

VSTEP > 0.5 V, Final VBUS > 13 V,

IOUT < ICS−EN−DSCG

tDISC3

Discharge Time (Note 5)

VSTEP > 0.5 V, Final VBUS < 13 V,

IOUT < ICS−EN−DSCG

tDISC4

221

OVER TEMPERATURE PROTECTION SECTION

Current Source on NTC pin (Note 6)

Resistance to ground on NTC =

3.293 kW

INTC

Debounce time for External Over Tempera-

ture Protection (E_OTP) (Note 6)

tNTC−DEB

Internal Die Warning Temperature Thresh-

old (Note 5)

TI_WARN

125

°C

Internal Die Over−Temperature Threshold

(Note 5)

TI_OTP

135

°C

PROTECTION RECOVERY SECTION

VCC Voltage Release Threshold

UVP fault causing release when VCC

< VLATCH

VLATCH

0.9

Duration for Disabling Load Switch When

Fault Removed in Normal Mode (Note 5)

After fault OVP, UVP, OCP, E_OTP,

I_OTP or CC_OVP has recovered

t2S_AR_NM

1.8

2.2

sec

Duration for Disabling Load Switch When

Fault Removed in Debug Test Mode

t2S_SR_DM

100

INPUTS SECTION

PDIV2, PDIV1 and PDIV0 input LOW volt-

age

Input LOW

VIL

0.4

PDIV2, PDIV1 and PDIV0 input HIGH volt-

age

Input HIGH

VIH

VDD − 0.4

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