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FUSB3307 数据表(PDF) 13 Page - ON Semiconductor |
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FUSB3307 数据表(HTML) 13 Page - ON Semiconductor |
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13 / 21 page ![]() FUSB3307 www.onsemi.com 13 Figure 10. VBUS Discharge by FUSB3307 via DISC Pin VBUS is discharged through a resistor (R1) via the DISC pin of the FUSB3307 as shown in the highlighted section in Figure 10. The external resistor R1 value is dependent on the total bulk capacitance (C8) of this power source so that VBUS is discharged within the time limits dictated by USB PD. A typical value for R1 is 39 W, 1 W and in addition, there is internal resistance that causes a expected discharge current within the FUSB3307 in its discharge path (IDISC −Sink in the electrical tables above). If the load current to the Sink is sufficient (exceeds ICS−EN−DSCG for tCS−EN−DSCG debounce time) such that the internal discharge is not needed, then the FUSB3307 will automatically disable internal discharge. Upon power up, the FUSB3307 will discharge VBUS in case there is any voltage on VBUS since the only way a Sink can be attached per Type C specification is if VBUS is discharged to ground (below VSafe0V) upon attach. The discharge resistance limits are governed by the Type C specification when not sourcing power on VBUS (RDISC−BUS in the electrical tables above). It is preferred that no external load/discharge resistor is connected to VBUS other than R1 to the FUSB3307 discharge DISC pin. A TVS diode connected from VBUS to ground and shown in the figures ([SZ]ESD7241) allow operating voltages up to 24 V covering the entire VBUS range of 3.3 V to 21 V for a USB PD PPS contract. This can be replaced by a TVS that covers the VBUS range for the use case of this design if needed. USB Type C specification requires that the supply voltage is not sourced on VBUS until an attach per Type C specification has been determined. Dual back−to−back FET’s for the load switch are not needed for reverse voltage protection since it is unlikely that VBUS is charged from an external source. For interoperability with legacy connectors, there is a case where a Type A to Type C cable is first plugged into a Type A port of a power source which then supplies 5 V on VBUS of the cable. Then the Type C connector is plugged into this design which is not plugged into the AC outlet nor gets it power from the DC input depending on the design. The 5 V from the cable will forward conduct through the Q1 FET and charge the bulk capacitor C8. This doesn’t cause an issue, since the FUSB3307 will power up, check the CC1 and CC2 lines and realize it is not a legitimate Sink device plugged in and stay detached. Upon unplugging the A to C cable, the discharge resistance (RDISC−BUS in the electrical tables above) will discharge VBUS to ground if the input voltage is still unavailable. Even if the input power is supplied to this design during this incorrect connection, VCC will regulate to 5 V which will prevent the previously forward bias body diode of Q1 FET from conducting and the FUSB3307 will wait for a legitimate Sink to be attached before turning on FET Q1. The maximum bulk capacitance is specified in the Type C specification to handle this fault case as shown in Table 5 from the USB Type C specification so as to allow for just one FET use for optimum efficiency. Table 5. TYPE−C SPECIFICATION FOR VBUS BULK CAPACITANCE Symbol Notes Min Max Units VBUS Capacitance Capacitance for source−only ports between VBUS and GND pins on receptacle when VBUS is not being sourced. 3000 mF Capacitance for DRP ports between VBUS and GND pins on recep- tacle when VBUS is not being sourced. 10 mF |
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