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M28F420 数据表(PDF) 21 Page - STMicroelectronics

部件名 M28F420
功能描述  4 Megabit (x8 or x16, Block Erase) FLASH MEMORY
PDF  38 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M28F420 数据表(HTML) 21 Page - STMicroelectronics

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background image
Symbol
Alt
Parameter
M28F410 / 420
Unit
-100
-120
VCC =5V
± 10%
VCC =5V
± 10%
EPROM
Interface
EPROM
Interface
Min
Max
Min
Max
tAVAV
tWC
Write Cycle Time
100
120
ns
tPHEL
tPS
Power Down High to Chip Enable Low
210
210
ns
tWLEL
tCS
Write Enable Low to Chip Enable Low
0
0
ns
tELEH
tWP
Chip Enable Low to Chip Enable High
60
70
ns
tDVEH
tDS
Data Valid to Chip Enable High
60
60
ns
tEHDX
tDH
Chip Enable High to Data Transition
0
0
ns
tEHWH
tCH
Chip Enable High to Write Enable High
10
10
ns
tEHEL
tWPH
Chip Enable High to Chip
Enable Low
40
50
ns
tAVEH
tAS
Address Valid to Chip Enable High
60
60
ns
tPHHEH
(5)
tPHS
Power Down VHH (Boot Block Unlock) to Chip
Enable High
100
100
ns
tVPHEH
(5 )
tVPS
VPP High to Chip Enable High
100
100
ns
tEHAX
tAH
Chip Enable High to Address Transition
10
10
ns
tEHQV1
(2, 3)
Chip Enable High to Output Valid (Word/Byte
Program)
77
μs
tEHQV2
(2, 3)
Chip Enable High to Output Valid (Boot Block
Erase)
0.4
0.4
sec
tEHQV3
(2)
Chip Enable High to Output Valid (Parameter
Block Erase)
0.4
0.4
sec
tEHQV4
(2)
Chip Enable High to Output Valid (Main Block
Erase)
0.7
0.7
sec
tQVPH
(5)
tPHH
Output Valid to Reset/Power Down High
0
0
ns
tQVVPL
(5)
Output Valid to VPP Low
0
0
ns
tPHBR
(4, 5)
Reset/Power Down High to Boot Block Relock
100
100
ns
Notes: 1. See Figure 3 and Table 8 for timing measurements.
2. Time is measured to Status Register Read giving bit b7 = ’1’.
3. For Program or Erase of the Boot Block RP must be at VHH.
4. Time required for Relocking the Boot Block.
5. Sampled only, not 100% tested.
Table 19B. Write AC Characteristics, Chip Enable Controlled (1)
(TA = 0 to 70
°C or –40 to 85°C; VPP = 12V ± 5%)
21/38
M28F410, M28F420



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