MCP4432-103ESLASHML datasheet(47/94 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS22267A-page 47

MCP443X/5X

6.0

SERIAL INTERFACE (I2C)

The MCP44XX devices support the I2C serial protocol.

The MCP44XX I2C’s module operates in Slave mode

(does not generate the serial clock).

Figure 6-1 shows a typical I2C Interface connection. All

I2C interface signals are high-voltage tolerant.

The MCP44XX devices use the two-wire I2C serial

interface. This interface can operate in standard, fast or

High-Speed mode. A device that sends data onto the

bus is defined as transmitter, and a device receiving

data as receiver. The bus has to be controlled by a

master device which generates the serial clock (SCL),

controls the bus access and generates the START and

STOP conditions. The MCP44XX device works as

slave. Both master and slave can operate as

transmitter or receiver, but the master device

determines which mode is activated. Communication is

initiated by the master (microcontroller) which sends

the START bit, followed by the slave address byte. The

first byte transmitted is always the slave address byte,

which contains the device code, the address bits, and

the R/W bit.

Refer to the NXP I2C document for more details of the

I2C specifications.

FIGURE 6-1:

Typical I2C Interface Block

Diagram.

6.1

Signal Descriptions

The I2C interface uses up to four pins (signals). These

are:

• SDA (Serial Data)

• SCL (Serial Clock)

• A0 (Address 0 bit)

• A1 (Address 1 bit)

6.1.1

SERIAL DATA (SDA)

The Serial Data (SDA) signal is the data signal of the

device. The value on this pin is latched on the rising

edge of the SCL signal when the signal is an input.

With the exception of the START and STOP conditions,

the high or low state of the SDA pin can only change

when the clock signal on the SCL pin is low. During the

high period of the clock, the SDA pin’s value (high or

low) must be stable. Changes in the SDA pin’s value

while the SCL pin is HIGH will be interpreted as a

START or a STOP condition.

6.1.2

SERIAL CLOCK (SCL)

The Serial Clock (SCL) signal is the clock signal of the

device. The rising edge of the SCL signal latches the

value on the SDA pin. The MCP44XX supports three

I2C interface clock modes:

• Standard Mode: clock rates up to 100 kHz

• Fast Mode: clock rates up to 400 kHz

• High-Speed Mode (HS mode): clock rates up to

3.4 MHz

The MCP44XX will not stretch the clock signal (SCL)

since memory read access occur fast enough.

Depending on the clock rate mode, the interface will

display different characteristics.

6.1.3

THE ADDRESS BITS (A1:A0)

There are up to two hardware pins used to specify the

device address. The number of address pins is

determined by the part number.

Address 0 is multiplexed with the High Voltage

Command (HVC) function. So the state of A0 is latched

on the MCP4XXX’s POR/BOR event.

The state of the A1 pin should be static, that is they

should be tied high or tied low.

6.1.3.1

The High Voltage Command (HVC)

Signal

The High Voltage Command (HVC) signal is

multiplexed with Address 0 (A0) and is used to indicate

that the command, or sequence of commands, are in

the High Voltage mode. High Voltage commands are

supported for compatibility with non-volatile devices.

The HVC pin has an internal resistor connection to the

MCP44XXs internal VDD signal.

SCL

MCP4XXX

SDA

HVC/A0 (2)

I/O (1)

Host

Controller

Typical I2C Interface Connections

Note 1: If High voltage commands are desired,

some type of external circuitry needs to

be implemented.

2: These pins have internal pull-ups. If

faster rise times are required, then

external pull-ups should be added.

3: This pin could be tied high, low, or

connected to an I/O pin of the Host

Controller.

A1 (2, 3)

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