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ACE25AC200GLDPTH 数据表(PDF) 7 Page - ACE Technology Co., LTD. |
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ACE25AC200GLDPTH 数据表(HTML) 7 Page - ACE Technology Co., LTD. |
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7 / 23 page ![]() ACE25AC200GL 2M SPI NOR FLASH VER 1.2 7 ID Definitions Operation Code M7-M0 ID15-ID8 ID7-ID0 9FH 0E 60 13 90H 0E 12 Write Enable (WREN) (06H) The Write Enable (WREN) command is for setting the Write Enable Latch (WEL) bit. The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Block Erase (BE), and Chip Erase (CE) and Write Status Register (WRSR) command. The Write Enable (WREN) command sequence: CS# goes low→Send Write Enable command→CS# goes high. Write Disable (WRDI) (04H) The Write Disable command is for resetting the Write Enable Latch (WEL) bit. The Write Disable command sequence: CS# goes low Send Write Disable command CS# goes high. The WEL bit is reset by following condition: Power-up and upon completion of the Write Status Register, Page Program, Sector Erase, Block Erase and Chip Erase commands. Figure1. Write Enable Sequence Diagram Figure2. Write Disable Sequence Diagram |
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