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ADCA3270ACEZ-R7 数据表(PDF) 3 Page - Analog Devices |
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ADCA3270ACEZ-R7 数据表(HTML) 3 Page - Analog Devices |
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3 / 14 page ![]() Data Sheet ADCA3270 Rev. 0 | Page 3 of 14 SPECIFICATIONS GENERAL PERFORMANCE Supply voltage (VCC) = 24 V, exposed paddle temperature (TPADDLE) = 35°C, source impedance (ZS) = load impedance (ZL) = 75 Ω, and dc current (ICC) = 480 mA, unless otherwise noted. Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments POWER GAIN S21 22.0 23.6 25.0 dB Frequency = 45 MHz, see Figure 4 23.0 25 26.5 dB Frequency = 1218 MHz, see Figure 4 SLOPE STRAIGHT LINE1 2.0 dB Frequency = 45 MHz to 1218 MHz FLATNESS OF FREQUENCY RESPONSE2 0.75 dB Frequency = 45 MHz to 1218 MHz REVERSE ISOLATION S12 28 dB Frequency = 45 MHz to 1218 MHz, see Figure 5 RETURN LOSS See Figure 3 and Figure 6 Input S11 −20 dB Frequency = 45 MHz to 320 MHz −15 dB Frequency = 320 MHz to 640 MHz −12 dB Frequency = 640 MHz to 870 MHz −12 dB Frequency = 870 MHz to 1000 MHz −12 dB Frequency = 1000 MHz to 1218 MHz Output S22 −20 dB Frequency = 45 MHz to 320 MHz −20 dB Frequency = 320 MHz to 640 MHz −20 dB Frequency = 640 MHz to 870 MHz −20 dB Frequency = 870 MHz to 1000 MHz −18 dB Frequency = 1000 MHz to 1218 MHz NOISE FIGURE 3 dB Frequency = 45 MHz 4 dB Frequency = 1218 MHz SUPPLY Voltage VCC 18 24 26 V Supply voltage can be adjusted for different applications, see the Applications Information section DC Current (Total) ICC (TOTAL) 350 480 500 mA Can be biased between 350 mA and 480 mA (see the Applications Information section) RF Input Bias Voltage VBIAS 1.08 V 1 Slope straight line is defined as the delta between the gain at the start frequency and the gain at the stop frequency. 2 Flatness of frequency response is defined as the delta between the gain at any frequency between the start and stop frequencies and a straight line reference drawn between the gain at the start frequency and the gain at the stop frequency. DISTORTION DATA (ALL DIGITAL CHANNEL PLAN) VCC = 24 V, TPADDLE = 35°C, and ZS = ZL = 75 Ω, unless otherwise noted. Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments TOTAL COMPOSITE POWER TCP 73 dBmV 18 dB tilt, 190 digital (256 QAMs) channels from 57 MHz to 1215 MHz 73 dBmV 9 dB tilt, 190 digital (256 QAMs) channels from 57 MHz to 1215 MHz ERROR RATES Modulation Error Rate MER 47 dB Bit Error Rate BER <1 × 10−10 PostViterbi, 18 dB tilt, 190 digital (256 QAMs) channels from 57 MHz to 1215 MHz <1 × 10−9 PreViterbi, 9 dB tilt, 190 digital (256 QAMs) channels from 57 MHz to 1215 MHz |
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