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ADCA3270ACEZ-R7 数据表(PDF) 12 Page - Analog Devices

部件名 ADCA3270ACEZ-R7
功能描述  DOCSIS 3.1 Power Doubler Amplifier, 45 MHz to 1218 MHz
PDF  14 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADCA3270ACEZ-R7 数据表(HTML) 12 Page - Analog Devices

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ADCA3270
Data Sheet
Rev. 0 | Page 12 of 14
Figure 19. Recommended PCB Layout (Dimensions Shown in Millimeters)
ADCA3270 BIAS CURRENT
The ADCA3270 employs a versatile circuit design, allowing
system designers to configure the supply voltage at the VCC
connection (Pin 7) and the bias control voltage (VBIAS) at the
RFIP (Pin 1) and RFIN (Pin 4) connections to optimize the
power dissipation in any given application. It is recommended
that the ICC be controlled by employing a precision 5 V reference
and a resistor divider (R1 and R2) to set ICC as illustrated in
Figure 20. The voltage is connected to each input through a ferrite
bead (FB1 and FB2). The dc output of the balun used to feed the
RF into the power amplifier must be blocked using a capacitor.
5V
REFERENCE
FB1
RFIP
RFIN
FB2
VBIAS
R2
R1
Figure 20. Setting the Bias Control Voltage
Figure 21 provides the typical transfer function of ICC to VBIAS,
which allows the user to adjust ICC from 380 mA to 480 mA.
480
470
450
410
430
350
370
390
460
420
440
360
380
400
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
VBIAS (V)
Figure 21. ICC vs. VBIAS



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