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24CS512-E/P 数据表(PDF) 15 Page - Microchip Technology

部件名 24CS512-E/P
功能描述  512-Kbit, 3.4MHz I2C Serial EEPROM with 128-Bit Serial Number and Enhanced Software Write Protection
PDF  66 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

24CS512-E/P 数据表(HTML) 15 Page - Microchip Technology

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 2018-2021 Microchip Technology Inc.
DS20005769C-page 15
24CS512
6.0
WRITE OPERATIONS
All write operations for the 24CS512 begin with the host
sending a Start condition, followed by a device address
byte with the R/W bit set to a logic ‘0’ and then by the
word address bytes. The data value(s) to be written to
the device immediately follow the word address bytes.
6.1
Byte Write
The 24CS512 supports the writing of a single 8-bit byte.
Selecting a data byte in the 24CS512 requires a 16-bit
word address.
Upon receipt of the proper device address and the
word address bytes, the EEPROM will send an
Acknowledge. The device will then be ready to receive
the 8-bit data byte. Following the receipt of the data
byte, the EEPROM will respond with an Acknowledge.
The addressing device, such as a host, must then ter-
minate the write operation with a Stop condition. At that
time, the EEPROM will enter an internally self-timed
write cycle, which will be completed within TWC, while
the data byte is being programmed into the nonvolatile
EEPROM. All inputs are disabled during this write cycle
and the EEPROM will not respond until the write
operation is complete.
If an attempt is made to write to a write-protected
portion of the array, no data will be written and the
device will immediately accept a new command.
FIGURE 6-1:
BYTE WRITE
SCL
13
4
5
6
7
8
29
MSb
13
4
5
6
7
8
29
11
0
A2
A1
A0
0
0
A15 A14
A12 A11 A10 A9
A8
0
A13
0
SDA
MSb
1
3
45
67
8
29
1
3
45
67
8
29
MSb
A7
A5
A4
A3
A2
A1 A0
A6
D7
D6
D4
D3 D2
D1 D0
0
D5
0
MSb
Device Address Byte
Word Address – Byte 0
ACK
from
Client
ACK
from
Client
Start
by
Host
Data Byte
Word Address – Byte 1
ACK
from
Client
ACK
from
Client
Stop
by
Host



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