AT45DB321E datasheet(13/70 Pages) DIALOG

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AT45DB321E

8784L–DFLASH–3/2019

must be clocked into the device followed by three address bytes comprised of 2 dummy bits, 13 page address bits (A21 -

A9) that specify the page in the main memory to be written, and 9 byte address bits (A8 - A0) designate the starting byte

address within the page to reprogram.

After the address bytes have been clocked in, any number of sequential data bytes from one to 512/528 bytes can be

clocked into the device. If the end of the buffer is reached when clocking in the data, then the device will wrap around

back to the beginning of the buffer. After all data bytes have been clocked into the device, a low-to-high transition on the

CS pin will start the self-contained, internal read-modify-write operation. Only the data bytes that were clocked into the

device will be reprogrammed in the main memory.

Example:

If only one data byte was clocked into the device, then only one byte in main memory will be reprogrammed

and the remaining bytes in the main memory page will remain in their previous state.

The CS pin must be deasserted on a byte boundary (multiples of 8 bits); otherwise, the operation will be aborted and no

data will be programmed. The reprogramming of the data bytes is internally self-timed and should take place in a

maximum time of t

P. During this time, the RDY/BUSY bit in the Status Register will indicate that the device is busy.

The device also incorporates an intelligent erase and programming algorithm that can detect when a byte location fails to

erase or program properly. If an erase or program error arises, it will be indicated by the EPE bit in the Status Register.

The Read-Modify-Write command uses the same opcodes as the Auto Page Rewrite command. If no data bytes are

clocked into the device, then the device will perform an Auto Page Rewrite operation. See the Auto Page Rewrite

command description on page 26 for more details.

6.7

Page Erase

The Page Erase command can be used to individually erase any page in the main memory array allowing the Buffer to

Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program through Buffer 1

command to be utilized at a later time.

To perform a Page Erase with the standard DataFlash page size (528 bytes), an opcode of 81h must be clocked into the

device followed by three address bytes comprised of one dummy bits, 13 page address bits (PA12 - PA0) that specify the

page in the main memory to be erased, and 10 dummy bits. To perform a Page Erase with the binary page size (512

bytes), an opcode of 81h must be clocked into the device followed by three address bytes comprised of two dummy bits,

13 page address bits (A21 - A9) that specify the page in the main memory to be erased, and nine dummy bits.

When a low-to-high transition occurs on the CS pin, the device will erase the selected page (the erased state is a Logic

1). The erase operation is internally self-timed and should take place in a maximum time of t

PE. During this time, the

RDY/BUSY bit in the Status Register will indicate that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If

an erase error arises, it will be indicated by the EPE bit in the Status Register.

6.8

Block Erase

The Block Erase command can be used to erase a block of eight pages at one time. This command is useful when

needing to pre-erase larger amounts of memory and is more efficient than issuing eight separate Page Erase

commands.

To perform a Block Erase with the standard DataFlash page size (528 bytes), an opcode of 50h must be clocked into the

device followed by three address bytes comprised of one dummy bit, 10 page address bits (PA12 - PA3), and 13 dummy

bits. The 10 page address bits are used to specify which block of eight pages is to be erased.

To perform a Block Erase with the binary page size (512 bytes), an opcode of 50h must be clocked into the device

followed by three address bytes comprised of two dummy bits, 10 page address bits (A21 - A12), and 12 dummy bits.

The 10 page address bits are used to specify which block of eight pages is to be erased.

When a low-to-high transition occurs on the CS pin, the device will erase the selected block of eight pages. The erase

operation is internally self-timed and should take place in a maximum time of t

BE. During this time, the RDY/BUSY bit in

the Status Register will indicate that the device is busy.

AT45DB321E 数据表(PDF) 13 Page - Dialog Semiconductor

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