AT45DB321E datasheet(2/70 Pages) DIALOG

2 / 70 page

8784L–DFLASH–3/2019

Features

Single 2.3V - 3.6V supply

Serial Peripheral Interface (SPI) compatible

Supports SPI modes 0 and 3

Supports RapidS™ operation

Continuous read capability through entire array

Up to 85MHz

Low-power read option up to 15MHz

Clock-to-output time (t

V) of 6ns maximum

User configurable page size

512 bytes per page

528 bytes per page (default)

Page size can be factory pre-configured for 512 bytes

Two fully independent SRAM data buffers (512/528 bytes)

Flexible programming options

Byte/Page Program (1 to 512/528 bytes) directly into main memory

Buffer Write

Buffer to Main Memory Page Program

Flexible erase options

Page Erase (512/528 bytes)

Block Erase (4 KB)

Sector Erase (64 KB)

Chip Erase (32 Mbits)

Program and Erase Suspend/Resume

Advanced hardware and software data protection features

Individual sector protection

Individual sector lock-down to make any sector permanently read-only

128-byte, One-Time Programmable (OTP) Security Register

64 bytes factory programmed with a unique identifier

64 bytes user programmable

Hardware and software controlled reset options

JEDEC Standard Manufacturer and Device ID Read

Low-power dissipation

400nA Ultra-Deep Power-Down current (typical)

3µA Deep Power-Down current (typical)

25µA Standby current (typical)

7mA Active Read current (typical)

Endurance: 100,000 program/erase cycles per page minimum

Data retention: 20 years

Green (Pb/Halide-free/RoHS compliant) packaging options

8-lead SOIC (0.208" wide)

8-pad Ultra-thin DFN (5 x 6 x 0.6mm)

Die in Wafer Form

AT45DB321E

32-Mbit DataFlash (with Extra 1-Mbits), 2.3V Minimum

SPI Serial Flash Memory

AT45DB321E 数据表(PDF) 2 Page - Dialog Semiconductor

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