USB5926CSLASHKD datasheet(34/65 Pages) MICROCHIP

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2019 - 2021 Microchip Technology Inc.

DS00003190B-page 34

USB5926C

8.2

Battery Charging

The device can be configured by an OEM to have any of the downstream ports support battery charging. The hub’s role

in battery charging is to provide acknowledgment to a device’s query as to whether the hub system supports USB battery

charging. The hub silicon does not provide any current or power FETs or any additional circuitry to actually charge the

device. Those components must be provided externally by the OEM.

If the OEM provides an external supply capable of supplying current per the battery charging specification, the hub can

be configured to indicate the presence of such a supply from the device. This indication, via the

PRT_CTL[6:1] pins, is

on a per port basis. For example, the OEM can configure two ports to support battery charging through high current

power FETs and leave the other two ports as standard USB ports.

For additional information, refer to the Microchip USB5926C Battery Charging application note on the Microchip.com

USB5926C product page www.microchip.com/USB5926C.

8.3

Resets

• Power-On Reset (POR)

• External Chip Reset (RESET_N)

• USB Bus Reset

8.3.1

POWER-ON RESET (POR)

A power-on reset occurs whenever power is initially supplied to the device, or if power is removed and reapplied to the

device. A timer within the device will assert the internal reset per the specifications listed in Section 10.6.2, Power-On

and Configuration Strap Timing.

8.3.2

EXTERNAL CHIP RESET (

RESET_N)

A valid hardware reset is defined as assertion of

RESET_N, after all power supplies are within operating range, per the

specifications in Section 10.6.3, Reset and Configuration Strap Timing. While reset is asserted, the device (and its asso-

ciated external circuitry) enters Standby Mode and consumes minimal current.

Assertion of

RESET_N causes the following:

1. The PHY is disabled and the differential pairs will be in a high-impedance state.

2. All transactions immediately terminate; no states are saved.

3. All internal registers return to the default state.

4. The external crystal oscillator is halted.

5. The PLL is halted.

FIGURE 8-6:

BATTERY CHARGING EXTERNAL POWER SUPPLY

Note:

All power supplies must have reached the operating levels mandated in Section 10.2, Operating Condi-

tions**, prior to (or coincident with) the assertion of

RESET_N.

SOC

VBUS[n]

INT

SCL

SDA

Microchip

Hub

DC Power

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