ADP5062ACPZ-2-R7 datasheet(26/44 Pages) AD

26 / 44 page

ADP5062

Data Sheet

Rev. B | Page 26 of 44

I2C INTERFACE

The ADP5062 includes an I2C-compatible serial interface for

control of the charging and LDO functions, as well as for a

readback of the system status registers. The I2C chip address

is 0x28 in write mode and 0x29 in read mode.

supply falls below the falling voltage threshold, VVIN_OK_FALL.

The I2C registers also reset when the battery is disconnected and

VIN is 0 V.

The subaddress content selects which of the ADP5062 registers

is written to first. The ADP5062 sends an acknowledgement to

the master after the 8-bit data byte has been written (see Figure 34

for an example of the I2C write sequence to a single register).

The ADP5062 increments the subaddress automatically and

starts receiving a data byte at the next register until the master

sends an I2C stop as shown in Figure 35.

Figure 36 shows the I2C read sequence of a single register.

ADP5062 sends the data from the register denoted by the

subaddress and increments the subaddress automatically,

sending data from the next register until the master sends an

I2C stop condition, as shown in Figure 37.

Figure 34. I2C Single Register Write Sequence

Figure 35. I2C Multiple Register Write Sequence

Figure 36. I2C Single Register Read Sequence

Figure 37. I2C Multiple Register Read Sequence

SUBADDRESS

CHIP ADDRESS

0 SP

ADP5062 RECEIVES

DATA

0 = WRITE

MASTER STOP

0 = WRITE

CHIP ADDRESS

1010

ADP5062 RECEIVES

DATA TO REGISTER N

MASTER STOP

ADP5062 RECEIVES

DATA TO REGISTER N + 1

ADP5062 RECEIVES

DATA TO LAST REGISTER

SUBADDRESS

0 = WRITE

SUBADDRESS

CHIP ADDRESS

0 0

1010

MASTER

STOP

CHIP ADDRESS

ADP5062 SEND

SDATA

0 0

1 = READ

0 = WRITE

MASTER

STOP

1 = READ

SUBADDRESS

CHIP ADDRESS

0 0 1010 0

ADP5062 SENDS

DATA OF REGISTER N

ADP5062 SENDS

DATA OF REGISTER

N + 1

ADP5062 SENDS

DATA OF LAST

CHIP ADDRESS

0 0101 00

1 0

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