ADP5062ACPZ-2-R7 datasheet(31/44 Pages) AD

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Data Sheet

ADP5062

Rev. B | Page 31 of 44

Bit No.

Bit Name

Access

Default

Description

[4:3]

VTRK_DEAD[1:0]

R/W

01 = 2.5 V

Trickle to fast charge dead battery voltage programming bus. The

values of the trickle to fast charge threshold can be programmed to

the following values:

00 = 2.0 V.

01 = 2.5 V.

10 = 2.6 V.

11 = 2.9 V.

[2:0]

VWEAK[2:0]

R/W

011 = 3.0 V

Weak battery voltage rising threshold.

000 = 2.7 V.

001 = 2.8 V.

010 = 2.9 V.

011 = 3.0 V.

100 = 3.1 V.

101 = 3.2 V.

110 = 3.3 V.

111 = 3.4 V.

Table 24. Timer Settings, Register Address 0x06

Bit No.

Bit Name

Access

Default

Description

[7:6]

Not used

EN_TEND

R/W

0 = charge complete timer, tEND, disabled. A 31 ms deglitch timer

remains on.

1 = charge complete timer enabled.

EN_CHG_TIMER

R/W

0 = trickle/fast charge timer disabled.

1 = trickle/fast charge timer enabled.

CHG_TMR_PERIOD

R/W

Trickle and fast charge timer period.

0 = 30 sec trickle charge timer and 300 minute fast charge timer.

1 = 60 sec trickle charge timer and 600 minute fast charge timer.

EN_WD

R/W

0 = watchdog timer is disabled even when BAT_SNS exceeds VWEAK.

1 = watchdog timer safety timer is enabled.

WD_PERIOD

R/W

Watchdog safety timer period.

0 = 32 sec watchdog timer and 40 minute safety timer.

1 = 64 sec watchdog timer and 40 minute safety timer.

RESET_WD

When RESET_WD is set to logic high by I2C, the watchdog safety

timer is reset.

Table 25. Functional Settings 1, Register Address 0x07

Bit No.

Bit Name

Access

Default

Description

Not used

DIS_IC1

R/W

0 = normal operation.

1 = the ADP5062 is disabled; VVINx must be VISO_Bx < VVINx < 5.5 V.

EN_BMON

R/W

0 = when VVINx < VVIN_OK_RISE or VVIN_OK_FALL, the battery monitor is

disabled. When VVINx = 4.0 V to 6.7 V, the battery monitor is enabled

regardless of the EN_BMON state.

1 = the battery monitor is enabled even when the voltage at the

VINx pins is below VVIN_OK.

EN_THR

R/W

0 = when VVINx < VVIN_OK_RISE or VVIN_OK_FALL, the THR current source is

disabled. When VVINx = 4.0 V to 6.7 V, the THR current source is

enabled regardless of the EN_THR state.

1 = THR current source is enabled even when the voltage at the

VINx pins is below VVIN_OK_RISE or VVIN_OK_FALL.

DIS_LDO

R/W

0 = LDO is enabled.

1 = LDO is off. In addition, if EN_CHG = low, the battery isolation

FET is on. If EN_CHG = high, the battery isolation FET is off.

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