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ADP1851ACPZ-R7 数据表(PDF) 15 Page - Analog Devices |
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ADP1851ACPZ-R7 数据表(HTML) 15 Page - Analog Devices |
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15 / 24 page ![]() Data Sheet ADP1851 Rev. B | Page 15 of 24 APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL The ADP1851 is supported by the ADIsimPower™ design tool set. ADIsimPower is a collection of tools that produce complete power designs optimized for a specific design goal. The tools allow the user to generate a full schematic and bill of materials and to calculate performance in minutes. ADIsimPower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the IC and all real external components. The ADIsimPower tool can be found at www.analog.com/ADIsimPower, and the user can request an unpopulated board through the tool. SETTING THE OUTPUT VOLTAGE The output voltage is set using a resistive voltage divider from the output to FB. For RBOT, use a 1 kΩ to 20 kΩ resistor. Choose RTOP to set the output voltage by using the following equation: FB FB OUT BOT TOP V V V R R where: RTOP is the high-side voltage divider resistance. RBOT is the low-side voltage divider resistance. VOUT is the regulated output voltage. VFB is the feedback regulation threshold, 0.6 V. SOFT START The soft start period is set by an external capacitor between SS and AGND. The soft start function limits the input inrush current and prevents output overshoot. When EN is enabled, a current source of 6.5 μA starts charging the capacitor, and the regulation voltage is reached when the voltage at SS reaches 0.6 V. The soft start time is approximated by SS SS C t μA 5 . 6 V 6 . 0 The SS pin reaches a final voltage equal to VCCO. When a controller is disabled, for example, if EN is pulled low or experiences an overcurrent limit condition, the soft start capacitor is discharged through an internal 3 kΩ pull-down resistor. SETTING THE CURRENT LIMIT The current-limit comparator measures the voltage across the low-side MOSFET to determine the load current. The current limit is set by an external current-limit resistor, RILIM, between ILIM and SW. The current sense pin, ILIM, sources nominally 50 μA to this external resistor. This creates an offset voltage of RILIM multiplied by 50 μA. When the drop across the current sense element RCS (low-side MOSFET, RDSON) is equal to or greater than this offset voltage, the ADP1851 flags a current- limit event. μA 50 06 . 1 CS LPK ILIM R I R where: ILPK is the peak inductor current. ACCURATE CURRENT-LIMIT SENSING The RDSON of the MOSFET can vary by more than 50% over the temperature range. Accurate current-limit sensing is achieved by adding a current sense resistor from the source of the low- side MOSFET to PGND. Make sure that the power rating of the current sense resistor is adequate for the application. Figure 24 illustrates the implementation of accurate current-limit sensing. VIN ADP1851 DH SW ILIM DL RILIM RSENSE Figure 24. Accurate Current-Limit Sensing INPUT CAPACITOR SELECTION Use two parallel capacitors placed close to the drain of the high- side switch MOSFET (one bulk capacitor of sufficiently high current rating and a 10 μF ceramic decoupling capacitor). Select the input bulk capacitor based on its ripple current rating. The minimum input capacitance required for a particular load is SW ESR O PP O MIN IN f DR I V D D I C ) ( ) 1 ( , where: IO is the output current. D is the duty cycle. VPP is the desired input ripple voltage. RESR is the equivalent series resistance of the capacitors. |
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