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10. Electrical Specifications

10.5. AC Electrical Characteristics

Table 10-5. Read/Write Timing

Symbol

Parameter

Min

Max

Unit

Notes

t

CLK

CLK period—SPI Read (’h03)

30.3

-

ns

33 MHz

CLK period—all other operations

7

133/144 MHz*

t

CH

/t

CL

Clock high/low width

0.45

0.55

t

CLK

(min)

-

Clock rise or fall time

-

1.5

ns

-

CE# HIGH between subsequent burst

operations

50

-

ns

-

t

CEM

CE# low pulse width

-

8

μs

-

t

CSP

CE# setup time to CLK rising edge

2.5

-

ns

-

CE# hold time from CLK rising edge

20

-

-

Setup time to active CLK edge

2

-

-

t

HD

Hold time from active CLK edge

2

-

-

t

HZ

Chip disable to DQ output height-Z

-

6

-

t

ACLK

CLK to output delay

2

6

-

t

KOH

Data hold time from clock falling edge

1.5

-

-

���� Note*:

1. Only Linear Burst allows page boundary crossing. Frequency limits are therefore

• 133/144 MHz MAX. without crossing page boundaries, and

• 84 MHz MAX. when burst commands cross page boundaries.

2. For ESP-PSRAM64, the maximum frequency is 144 MHz, while for ESP-PSRAM64H, it is 133 MHz.

3. For operating frequencies > 84 MHz, refer to JEDEC JESD84-B50 for data sampling training.

Espressif Systems

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2018.06

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