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ESP-PSRAM64 数据表(PDF) 10 Page - List of Unclassifed Manufacturers

部件名 ESP-PSRAM64
功能描述  This document introduces the specifications of ESP-PSRAM64 and ESP-PSRAM64H.
PDF  26 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
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标志 ETC - List of Unclassifed Manufacturers

ESP-PSRAM64 数据表(HTML) 10 Page - List of Unclassifed Manufacturers

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5. Interface Description
5.
Interface Description
5.1. Address Space
The SPI/QPI PSRAM device is byte-addressable. The address of the 64 Mbit device is A[22:0].
5.2. Page Size
The page size is 1K (CA[9:0]). The default setting is a linear burst that crosses page boundaries in
a continuous manner. Note, however, that the maximum input clock frequency for burst operations
which cross page boundaries is 84 MHz. Optionally, the device can also be set to the 32-byte wrap
(CA[4:0]) mode, using the Wrap Boundary Toggle command, but the device cannot cross page
boundaries in this case.
5.3. Power-on Status
The device powers up in SPI Mode. It is required to have CE# high before beginning any opera-
tions.
5.4. Truth Table
The device recognizes the following commands specified by the various input methods.
Command
Code
SPI Mode (QE=0)
QPI Mode (QE=1)
Cmd
Addr
Wait
Cycle DIO
MAX
Freq.
Cmd
Addr
Wait
Cycle
DIO MAX Freq.
Read
'h03
S*note1 S
0
S
33
N/A
Fast Read
'h0B
S
S
8
S
133/144 N/A
Fast Read
Quad
'hEB
S
Q
6
Q*note
1
133/144 Q
Q
6
Q
133/144*note2
Write
'h02
S
S
0
S
133/144 Q
Q
0
Q
133/144*note2
Quad Write
'h38
S
Q
0
Q
133/144 Same as 'h02
Enter Quad
Mode
'h35
S
-
-
-
133/144 N/A
Exit Quad
Mode
'hF5
N/A
Q
-
-
-
133/144
Reset
Enable
'h66
S
-
-
-
133/144 Q
-
-
-
133/144
Reset
'h99
S
-
-
-
133/144 Q
-
-
-
133/144
Espressif Systems
" /"
2018.06
6 22



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