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EDBA164B4PK-1DITF-R 数据表(PDF) 66 Page - Micron Technology |
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EDBA164B4PK-1DITF-R 数据表(HTML) 66 Page - Micron Technology |
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66 / 152 page ![]() Table 49: REFRESH Command Scheduling Separation Requirements (Continued) Symbol Minimum Delay From To Notes tRRD REFpb ACTIVATE command to a different bank than REFpb ACTIVATE REFpb affecting an idle bank (different bank than activate) 1 ACTIVATE command to a different bank than the prior ACTIVATE com- mand Note: 1. A bank must be in the idle state before it is refreshed, so REFab is prohibited following an ACTIVATE command. REFpb is supported only if it affects a bank that is in the idle state. REFRESH Requirements 1. Minimum Number of REFRESH Commands Mobile LPDDR2 requires a minimum number, R, of REFRESH (REFab) commands with- in any rolling refresh window (tREFW = 32 ms @ MR4[2:0] = 011 or TC ≤ 85˚C). For actual values per density and the resulting average refresh interval (tREFI), see Refresh Re- quirements. For tREFW and tREFI refresh multipliers at different MR4 settings, see the MR4 Device Temperature (MA[7:0] = 04h) table. For devices supporting per-bank REFRESH, a REFab command can be replaced by a full cycle of eight REFpb commands. 2. Burst REFRESH Limitation To limit current consumption, a maximum of eight REFab commands can be issued in any rolling tREFBW (tREFBW = 4 × 8 × tRFCab). This condition does not apply if REFpb commands are used. 3. REFRESH Requirements and Self Refresh If any time within a refresh window is spent in self refresh mode, the number of re- quired REFRESH commands in that window is reduced to the following: R´ = R - RU tSRF tREFI Where RU represents the round-up function = R - RU R × tSRF tREFW 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM REFRESH Command 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 66 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
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