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ADP2450ASTZ-5-R7 数据表(PDF) 31 Page - Analog Devices

部件名 ADP2450ASTZ-5-R7
功能描述  Power Management IC for Circuit Breaker Applications
PDF  40 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP2450ASTZ-5-R7 数据表(HTML) 31 Page - Analog Devices

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Data Sheet
ADP2450
Rev. B | Page 31 of 40
BUCK REGULATOR OUTPUT CAPACITOR SETTING
The output of the buck regulator provides the power supply for the
PGAs, MCU, and LCD display. In most MCCB applications, the
output voltage ripple requirement is important.
To meet the output voltage ripple requirement, use the following
equations to calculate the ESR and capacitance values of the
output capacitor of buck regulator:
2_
2_
8
L
OUT
RIPPLE
SW
OUT
RIPPLE
I
C
fV

2_
OUT
RIPPLE
L
V
ESR
I
This calculation results in COUT2_RIPPLE = 1.56 μF and ESR =
66 mΩ. The output capacitance must be larger than 1.56 μF, and
the output capacitor ESR value must be smaller than 66 mΩ to
meet the output voltage ripple requirement. It is recommended
to use a one piece, 10 μF ceramic capacitor (such as the
GRM21BR70J106KE76 from Murata) as the output capacitor of
the buck regulator.
VPTH RESISTOR DIVIDER SETTING
According to the system enable and disable voltage threshold
requirements, use the following equation to calculate the VPTH
resistor divider values (see Table 14 for the VSYS_RISING and
VSYS_FALLING values):
__
_
1.09 V
1.22 V
1.09 V 4.8 μA 1.22 V 1 μA
SYS RISING
SYS FALLING
TOP VP
VV
R


_
_
__
1.22 V
4.8 μA 1.22 V
TOP VP
BOT VP
SYS RISING
TOP VP
R
R
VR

This calculation results in RTOP_VP = 316.6 kΩ and RBOT_VP =
61.7 kΩ. Select a standard resistor value of 316 kΩ for RTOP_VP
and 61.9 kΩ for RBOT_VP.
DUMMY LOAD RESISTOR SETTING
The dummy load, together with the power detection function,
ensures that the system is not enabled until there is sufficient
current provided by the CT.
Calculate the dummy load resistor value using the following
equation:
_
_
SYS RISING
POWER
SYS MIN
V
R
I
This calculation results in RPOWER = 600 Ω. Choose the standard
resistor value 604 Ω for RPOWER.
Calculate the power consumption on the dummy load resistor
using the following equation (see Table 14 for the ISYS_MIN value):
2
_
DUMMY
SYS MIN
POWER
PI
R

This calculation results in PDUMMY = 0.136 W. Select one 604 Ω
resistor with a 0805 package or two parallel 1.21 kΩ resistors
with 0603 packages as the dummy load.
PGA GAIN SETTING
Set the PGA gain to ×1 as a start point. According to Table 8,
connect a 42.2 kΩ resistor between the GAIN1 pin and ground.
Connect the GAIN0 pin to an input/output (I/O) pin of the
MCU. If needed, switch the PGA gain between ×1 and ×4 by
setting the GAIN0 pin to low and high, respectively.
SENSE RESISTOR SETTING
Choose a 2 Ω resistor as the sense resistor for each phase to set
the input voltage of PGA to 150 mV under the rated current, IN.
The power consumption on the sense resistor (PSENSE_MAX) when
the analog trip occurs is calculated using the following equation
(see Table 14 for the ITRP_SEC value):
2
__
SENSE MAX
TRP SEC
SENSE
PI
R

where:
RSENSE is the sense resistor value.
This calculation results in PSENSE_MAX = 1.36 W. Select a 2 Ω, 2 W
resistor, such as the CRM2512-FX-2R00ELF from Bourns, as
the sense resistor.
ANALOG TRIP THRESHOLD SETTING
The PGA output voltage is a half-sinusoid waveform. Calculate
the PGA output voltage peak value (VPGA_PEAK) when the analog
trip is triggered by using the following equation:
__
2
PGA PEAK
TRP SEC
SENSE
VI
R
GAIN

where GAIN = 1.
This calculation results in VPGA_PEAK = 2.333 V.
Consider that the analog trip has a default 200 μs delay time, which
results in a 3.6° phase delay of the half-sinusoid waveform. Set
the analog trip threshold voltage using the following equation:
_
sin86.4
TRP
PGA PEAK
VV

This calculation results in VTRP = 2.328 V.
Calculate the trip resistor value (RTRP) using the following equation:
TRP
TRP
TRP
V
R
I
This calculation results in RTRP = 232.8 kΩ. Choose a standard
resistor value of 232 kΩ as the analog trip resistor.
ACTUATOR MOSFET SETTING
The VDSS of the MOSFET must be twice as large as VOUT1 to
provide enough margin. Choose a MOSFET with VDSS > 24 V.
When the actuator is triggered, the instantaneous current
flowing through the MOSFET is VOUT1/RACT = 3 A. Select a
MOSFET with ID > 3 A.
The VGS voltage of the MOSFET must be higher than 5 V.
It is recommended to select the FDMC86340 from ON
Semiconductor as the actuator MOSFET.



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