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ADCA5191ACPZ-R7 数据表(PDF) 3 Page - Analog Devices |
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ADCA5191ACPZ-R7 数据表(HTML) 3 Page - Analog Devices |
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3 / 24 page ![]() Data Sheet ADCA5191 SPECIFICATIONS analog.com Rev. 0 | 3 of 24 GENERAL DOWNSTREAM PERFORMANCE See the application circuit in Figure 39. Supply voltage (VDD) = 8.0 V, supply current (IDD) = 470 mA, paddle temperature (TPADDLE) = 35 °C, and source impedance (ZS) = load impedance (ZL) = 75 Ω, unless otherwise noted. Table 1. Downstream Performance Parameter Symbol Min Typ Max Unit Test Conditions/Comments BANDWIDTH 45 1800 MHz POWER GAIN S21 25.7 dB f = 45 MHz 25.8 dB f = 1218 MHz 25.8 dB f = 1800 MHz SLOPE OF STRAIGHT LINE1 0.1 0.1 dB f = 45 MHz to 1218 MHz f = 45 MHz to 1800 MHz FLATNESS OF FREQUENCY RESPONSE2 0.1 dB f = 45 MHz to 1800 MHz INPUT IMPEDANCE ZIN 37.5 Ω RFIP and RFIP REVERSE ISOLATION S12 −37 dB f = 45 MHz to 1800 MHz OUTPUT INTERMODULATION DISTORTION Third-Order Intercept Point OIP3 47 dBm f1 = 50 MHz to 1800 MHz, tone spacing = 6 MHz, 9 dBm per tone Second-Order Inercept Point Low-Side OIP2L 73 dBm f1 = 50 MHz to 1750 MHz, tone spacing = 50 MHz, 9 dBm per tone High-Side OIP2H 65 dBm f1 = 50 MHz to 850 MHz, tone spacing = 50 MHz, 9 dBm per tone OUTPUT IMPEDANCE ZOUT 37.5 Ω RFOP and RFON RETURN LOSS Input S11 −20 dB f = 45 MHz to 1218 MHz −20 dB f = 1218 MHz to 1800 MHz Output S22 −20 dB f = 45 MHz to 1218 MHz −18 dB f = 1218 MHz to 1800 MHz NOISE FIGURE Includes losses of baluns shown in Downstream Applications Circuit 3.4 dB f = 45 MHz 3.8 dB f = 1218 MHz 5.2 dB f = 1800 MHz SUPPLY Operating Voltage VDD 5.0 8.0 V Can be biased between 5.0 V and 8.0 V DC Current (Total) IDD (TOTAL) 470 mA Can be biased between 250 mA and 530 mA 1 The slope is defined as the delta of the gain at the start frequency and the gain at the stop frequency. 2 Flatness is defined as the maximum deviation from a linear best-fit of the gain in the frequency range of operation. |
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