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ADCA5190ACPZ-R7 数据表(PDF) 17 Page - Analog Devices |
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ADCA5190ACPZ-R7 数据表(HTML) 17 Page - Analog Devices |
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17 / 22 page ![]() Data Sheet ADCA5190 APPLICATIONS INFORMATION analog.com Rev. 0 | 17 of 22 DOWNSTREAM APPLICATIONS CIRCUIT WITH PASSIVE BIASING The schematic in Figure 31 and the PCB layout in Figure 34 are recommended for downstream cable system applications from 45 MHz to 1800 MHz that employ passive biasing. Recommended values for all components are in the BOM listed in Table 10. T1 is an RF transformer configured to transform the single-ended 75 Ω RF input to a differential signal that drives the 37.5 Ω inputs of the ADCA5190 (RFIN and RFIP). The voltage at Pin 1 of E2 is the filtered supply voltage, VDD. A resistor divider (R4 and R3) sets VBIAS_ADJ. See Supply Voltage and Bias Current for more information about how to set this voltage to adjust IDD. C6 stabilizes this reference and serves as the ac ground for the RF input signal. Capacitor C29 between the FBN pins (Pin 14 and Pin 16) provides feedback for the negative side of the amplifier, and Capacitor C30 between the FBP pins (Pin 25 and Pin 27) provides feedback for the positive side of the amplifier. T2 is an RF transformer configured to transform the differential 37.5 Ω outputs (RFON and RFOP) to a single-ended 75 Ω RF output. The C3, C5, C7, C8, C13, C14, C18, C20, L8, L9, L10, and L11 components are intended for impedance matching, and these components must be optimized to match the RF input source and RF output load. Capacitor C4 blocks the dc voltage of the RF input source. Capacitor C27 and Capacitor C28 block the dc voltage at the RFOP (Pin 22 and Pin 23) and RFON (Pin 18 and Pin 19) output pins. The L2 and L3 inductors are RF chokes connected to the filtered VDD supply voltage. Figure 31. Suggested Downstream Cable TV (CATV) Application Circuit with Passive Biasing Schematic |
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