AD9515

Data Sheet

Rev. B | Page 2 of 28

TABLE OF CONTENTS

Features .............................................................................................. 1

 

Applications ...................................................................................... 1

 

Functional Block Diagram .............................................................. 1

 

General Description ......................................................................... 1

 

Revision History ............................................................................... 2

 

Specifications .................................................................................... 3

 

Clock Input ................................................................................... 3

 

Clock Outputs............................................................................... 3

 

Timing Characteristics ................................................................ 4

 

Clock Output Phase Noise .......................................................... 5

 

Clock Output Additive Time Jitter ............................................ 8

 

SYNCB, VREF, and Setup Pins .................................................. 9

 

Power ........................................................................................... 10

 

Timing Diagrams............................................................................ 11

 

Absolute Maximum Ratings ......................................................... 12

 

Thermal Characteristics ............................................................ 12

 

ESD Caution................................................................................ 12

 

Pin Configuration and Function Descriptions .......................... 13

 

Terminology.................................................................................... 14

 

Typical Performance Characteristics........................................... 15

 

Functional Description.................................................................. 18

 

Overall.......................................................................................... 18

 

CLK, CLKB—Differential Clock Input ................................... 18

 

Synchronization ......................................................................... 18

 

RSET Resistor ................................................................................ 19

 

VREF............................................................................................ 19

 

Setup Configuration .................................................................. 19

 

Programming.................................................................................. 20

 

Divider Phase Offset .................................................................. 22

 

Delay Block ................................................................................. 22

 

Outputs ........................................................................................ 23

 

Power Supply .............................................................................. 23

 

Power Management ................................................................... 24

 

Applications .................................................................................... 25

 

Using the AD9515 Outputs for ADC Clock Applications ... 25

 

LVPECL Clock Distribution..................................................... 25

 

LVDS Clock Distribution.......................................................... 26

 

CMOS Clock Distribution ........................................................ 26

 

Setup Pins (S0 to S10)................................................................ 26

 

Power and Grounding Considerations and Power Supply

Rejection...................................................................................... 26

 

Phase Noise and Jitter Measurement Setups.......................... 27

 

Outline Dimensions....................................................................... 28

 

Ordering Guide .......................................................................... 28

 

REVISION HISTORY

9/2020—Rev. A to Rev. B

Changed CP-32-2 to CP-32-7......................................Throughout

Changes to Pin Configuration Section and Figure 6................. 13

Deleted Figure 7; Renumbered Sequentially .............................. 13

Updated Outline Dimensions....................................................... 28

Changes to Ordering Guide.......................................................... 28

4/2012—Rev. 0 to Rev. A

Changes to Table 9 ......................................................................... 13

Updated Outline Dimensions ...................................................... 28

Changes to Ordering Guide.......................................................... 28

7/2005—Revision 0: Initial Version