28 GHz 5G Medium Power Amplifier (MPA)

CMX90A702

© www.cmlmicro.com

Page 4

D/90A702/1 June 2022

Pin Assignments

Top View

Pin

Name

Description

1

NC

Connect to GND

2

GND

Connect to GND

3

RFin

RF input. Internally matched to 50 Ω. (DC path to ground)

4

GND

Connect to GND

5

PA_OFF

Amplifier enable/disabled input

6

Vg12

Stage 1 and 2 gate voltage

7

Vg3

Stage 3 gate voltage

8

Vd12

Stage 1 and 2 drain voltage (or use pin 19)

9

GND

Connect to GND

10

Vd3

Stage 3 drain voltage (or use pin 17)

11

NC

Connect to GND

12

GND

Connect to GND

13

RFout

RF output. Internally matched to 50 Ω with integrated DC-blocking

capacitor

14

GND

Connect to GND

15

Vdet

Power detector output

16

Vref

Power detector reference voltage

17

Vd3

Stage 3 drain voltage (or use pin 10)

18

GND

Connect to GND

19

Vd12

Stage 1 and 2 drain voltage (or use pin 8)

20

NC

Connect to GND

Die pad

GND

DC and RF ground. Exposed die pad must be connected to GND.

Notes

CML recommends that all no connect (NC) pins are connected to ground.

The bottom exposed die pad must be connected to the ground plane on the board.