ADP5589ACPZ-01-R7 datasheet(20/52 Pages) AD

20 / 52 page

ADP5589

Data Sheet

Rev. B | Page 20 of 52

Figure 30 shows a typical multibyte read sequence for reading

internal registers. The cycle begins with a start condition, followed

by the 7-bit device address (0x34), followed by the R/W bit set

to 0 for a write cycle. The ADP5589 acknowledges the address

byte by pulling the data line low. The address of the register

from which data is to be read is sent next. The ADP5589 acknowl-

edges the register pointer byte by pulling the data line low. A start

condition is repeated, followed by the 7-bit device address (0x34),

followed by the R/W bit set to 1 for a read cycle. The ADP5589

acknowledges the address byte by pulling the data line low. The

8-bit data is then read. The address pointer is then incremented

to read the next data byte, and the host continues to pull the data

line low for each byte (master acknowledge) until the n data

byte is read. The host pulls the data line high (no acknowledge)

after the last byte is read, and a stop condition completes the

sequence.

START

0 = WRITE

7-BIT DEVICE ADDRESS

ADP5589 ACK

8-BIT REGISTER POINTER

READ BYTE 1

READ BYTE 2

READ BYTE n

REPEAT START

1 = READ

ADP5589 ACK

MASTER ACK

NO ACK

STOP

Figure 30. I2C Multibyte Read Sequence

ADP5589ACPZ-01-R7 数据表(PDF) 20 Page - Analog Devices