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AM6441...ALV 数据表(PDF) 25 Page - Texas Instruments

部件名 AM6441...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6441...ALV 数据表(HTML) 25 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
V18
GPMC0_AD13
PADCONFIG:
PADCONFIG28
0x000F4070
GPMC0_AD13
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX1_D1
1
I
0
EHRPWM3_A
3
IO
0
TRC_DATA11
6
O
GPIO0_28
7
IO
pad
PRG0_PWM3_A0
9
IO
0
BOOTMODE13
Bootstrap
I
Y21
GPMC0_AD14
PADCONFIG:
PADCONFIG29
0x000F4074
GPMC0_AD14
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_TX0_D0
1
O
UART6_RXD
2
I
1
EHRPWM3_B
3
IO
0
TRC_DATA12
6
O
GPIO0_29
7
IO
pad
PRG0_PWM3_B0
9
IO
1
BOOTMODE14
Bootstrap
I
Y20
GPMC0_AD15
PADCONFIG:
PADCONFIG30
0x000F4078
GPMC0_AD15
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_TX0_D1
1
O
UART6_TXD
2
O
EHRPWM3_SYNCI
3
I
0
TRC_DATA13
6
O
GPIO0_30
7
IO
pad
BOOTMODE15
Bootstrap
I
P17
GPMC0_BE0n_CLE
PADCONFIG:
PADCONFIG36
0x000F4090
GPMC0_BE0n_CLE
0
O
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_TX1_D0
1
O
UART6_RTSn
2
O
EHRPWM_TZn_IN4
3
I
0
EHRPWM7_A
5
IO
0
TRC_DATA18
6
O
GPIO0_35
7
IO
pad
PRG1_PWM2_A1
9
IO
0
T19
GPMC0_BE1n
PADCONFIG:
PADCONFIG37
0x000F4094
GPMC0_BE1n
0
O
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_TX0_CLK
1
O
EHRPWM5_A
3
IO
0
TRC_DATA19
6
O
GPIO0_36
7
IO
pad
PRG0_PWM3_A2
9
IO
0
www.ti.com
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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