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AM6411...ALV 数据表(PDF) 45 Page - Texas Instruments

部件名 AM6411...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6411...ALV 数据表(HTML) 45 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
AA7
PRG1_PRU0_GPO6
PADCONFIG:
PADCONFIG52
0x000F40D0
PRG1_PRU0_GPO6
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
PRG1_PRU0_GPI6
1
I
0
PRG1_RGMII1_RXC
2
I
0
PRG1_PWM3_A1
3
IO
0
GPIO0_51
7
IO
pad
GPMC0_AD22
8
IO
0
U13
PRG1_PRU0_GPO7
PADCONFIG:
PADCONFIG53
0x000F40D4
PRG1_PRU0_GPO7
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
PRG1_PRU0_GPI7
1
I
0
PRG1_IEP0_EDC_LATCH_IN1
2
I
0
PRG1_PWM3_B1
3
IO
1
CPTS0_HW2TSPUSH
4
I
0
CLKOUT0
5
O
TIMER_IO10
6
IO
0
GPIO0_52
7
IO
pad
GPMC0_AD23
8
IO
0
W13
PRG1_PRU0_GPO8
PADCONFIG:
PADCONFIG54
0x000F40D8
PRG1_PRU0_GPO8
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
PRG1_PRU0_GPI8
1
I
0
PRG1_PWM2_A1
3
IO
0
RGMII1_RXC
4
I
0
GPIO0_53
7
IO
pad
GPMC0_AD24
8
IO
0
U15
PRG1_PRU0_GPO9
PADCONFIG:
PADCONFIG55
0x000F40DC
PRG1_PRU0_GPO9
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
PRG1_PRU0_GPI9
1
I
0
PRG1_UART0_CTSn
2
I
1
PRG1_PWM3_TZ_IN
3
I
0
RGMII1_TX_CTL
4
O
RMII1_RX_ER
5
I
0
PRG1_IEP0_EDIO_DATA_IN_OUT28
6
IO
0
GPIO0_54
7
IO
pad
GPMC0_AD25
8
IO
0
www.ti.com
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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