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AM6411...ALV 数据表(PDF) 22 Page - Texas Instruments

部件名 AM6411...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6411...ALV 数据表(HTML) 22 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
U21
GPMC0_AD1
PADCONFIG:
PADCONFIG16
0x000F4040
GPMC0_AD1
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX2_D0
1
I
0
UART2_TXD
2
O
EHRPWM0_SYNCO
3
O
TRC_CTL
6
O
GPIO0_16
7
IO
pad
PRG0_PWM2_TZ_OUT
9
O
BOOTMODE01
Bootstrap
I
T18
GPMC0_AD2
PADCONFIG:
PADCONFIG17
0x000F4044
GPMC0_AD2
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX2_D1
1
I
0
UART2_RTSn
2
O
EHRPWM_TZn_IN0
3
I
0
TRC_DATA0
6
O
GPIO0_17
7
IO
pad
PRG0_PWM2_TZ_IN
9
I
0
BOOTMODE02
Bootstrap
I
U20
GPMC0_AD3
PADCONFIG:
PADCONFIG18
0x000F4048
GPMC0_AD3
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX3_CLK
1
I
0
UART3_RXD
2
I
1
EHRPWM0_A
3
IO
0
TRC_DATA1
6
O
GPIO0_18
7
IO
pad
PRG0_PWM2_A0
9
IO
0
BOOTMODE03
Bootstrap
I
U18
GPMC0_AD4
PADCONFIG:
PADCONFIG19
0x000F404C
GPMC0_AD4
0
IO
0
On / Off / Off
On / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
FSI_RX3_D0
1
I
0
UART3_TXD
2
O
EHRPWM0_B
3
IO
0
TRC_DATA2
6
O
GPIO0_82
7
IO
pad
PRG0_PWM2_B0
9
IO
1
BOOTMODE04
Bootstrap
I
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
www.ti.com
22
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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