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AM6411...ALV 数据表(PDF) 165 Page - Texas Instruments |
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AM6411...ALV 数据表(HTML) 165 Page - Texas Instruments |
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165 / 244 page  Table 7-58. GPMC0 IOSETs (continued) SIGNALS IOSET1 IOSET2 BALL NAME MUXMODE BALL NAME MUXMODE GPMC0_AD27 PRG1_PRU0_GPO11 8 PRG1_PRU0_GPO11 8 GPMC0_AD28 PRG1_PRU0_GPO12 8 PRG1_PRU0_GPO12 8 GPMC0_AD29 PRG1_PRU0_GPO13 8 PRG1_PRU0_GPO13 8 GPMC0_AD30 PRG1_PRU0_GPO14 8 PRG1_PRU0_GPO14 8 GPMC0_AD31 PRG1_PRU0_GPO15 8 PRG1_PRU0_GPO15 8 GPMC0_BE2n PRG1_PRU0_GPO16 8 PRG1_PRU0_GPO16 8 GPMC0_A0 PRG1_PRU0_GPO17 8 PRG0_PRU0_GPO2 9 GPMC0_A1 PRG1_PRU0_GPO18 8 PRG0_PRU0_GPO4 9 GPMC0_A2 PRG1_PRU0_GPO19 8 PRG0_PRU0_GPO8 9 GPMC0_A3 PRG1_PRU1_GPO0 8 PRG0_PRU0_GPO14 9 GPMC0_A4 PRG1_PRU1_GPO1 8 PRG0_PRU0_GPO16 9 GPMC0_A5 PRG1_PRU1_GPO2 8 PRG0_PRU0_GPO18 9 GPMC0_A6 PRG1_PRU1_GPO3 8 PRG0_PRU0_GPO19 9 GPMC0_A7 PRG1_PRU1_GPO4 8 PRG0_PRU1_GPO12 9 GPMC0_A8 PRG1_PRU1_GPO5 8 PRG0_PRU1_GPO13 9 GPMC0_A9 PRG1_PRU1_GPO6 8 PRG0_PRU1_GPO14 9 GPMC0_A10 PRG1_PRU1_GPO7 8 PRG0_PRU1_GPO15 9 GPMC0_A11 PRG1_PRU1_GPO8 8 PRG0_PRU1_GPO16 9 GPMC0_A12 PRG1_PRU1_GPO9 8 PRG0_MDIO0_MDIO 9 GPMC0_A13 PRG1_PRU1_GPO10 8 PRG0_MDIO0_MDC 9 GPMC0_A14 PRG1_PRU1_GPO11 8 PRG0_PRU0_GPO12 9 GPMC0_A15 PRG1_PRU1_GPO12 8 PRG0_PRU0_GPO13 9 GPMC0_A16 PRG1_PRU1_GPO13 8 PRG0_PRU0_GPO15 9 GPMC0_A17 PRG1_PRU1_GPO14 8 PRG0_PRU0_GPO17 9 GPMC0_A18 PRG1_PRU1_GPO15 8 PRG0_PRU1_GPO3 9 GPMC0_A19 PRG1_PRU1_GPO16 8 PRG0_PRU1_GPO6 9 GPMC0_BE3n PRG1_PRU1_GPO17 8 PRG1_PRU1_GPO17 8 GPMC0_A20 GPMC0_CSn3 4 GPMC0_CSn3 4 GPMC0_A21 GPMC0_WAIT1 4 GPMC0_WAIT1 4 GPMC0_A22 GPMC0_WPn 4 GPMC0_WPn 4 7.10.5.9 I2C For more details about features and additional description information on the device Inter-Integrated Circuit, see the corresponding subsections within Signal Descriptions and Detailed Description sections. Section 7.10.5.9.1, Table 7-59 and Figure 7-54 assume testing over the recommended operating conditions and electrical characteristic conditions. 7.10.5.9.1 Timing Requirements for I2C Input Timings NO.(1) (6) PARAMETER DESCRIPTION MODE MIN MAX UNIT I1 tc(SCL) Cycle time, SCL Standard 10000 ns Fast 2500 ns I2 tsu(SCLH-SDAL) Setup time, SCL high before SDA low (for a repeated START condition) Standard 4700 ns Fast 600 ns I3 th(SDAL-SCLL) Hold time, SCL low after SDA low (for a START and a repeated START condition) Standard 4000 ns Fast 900 ns www.ti.com AM6442, AM6441, AM6421, AM6412, AM6411 SPRSP56D – JANUARY 2021 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 165 Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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