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AM6411...ALV 数据表(PDF) 202 Page - Texas Instruments |
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AM6411...ALV 数据表(HTML) 202 Page - Texas Instruments |
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202 / 244 page  PRUR3L Start Bit Data Bits PRG _UART0_TXD i PRU_UART_TIMING_01 PRUR3H PRUR1L Data Bits Bit Start PRG _UART0_RXD i PRUR1H (1) (1) (1) i in PRG _UART0_RXD and PRG _UART0_TXD = 0, 1 or 2 i i Figure 7-104. PRU_ICSSG UART Timing Requirements and Switching Characteristics 7.10.5.16.5 PRU_ICSSG Enhanced Capture Peripheral (ECAP) Table 7-125. PRU_ICSSG ECAP Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 1 3 V/ns OUTPUT CONDITIONS CL Output load capacitance 2 7 pF 7.10.5.16.5.1 PRU_ICSSG ECAP Timing Table 7-126. PRU_ICSSG ECAP Timing Requirements see Figure 7-105 NO. PARAMETER DESCRIPTION MIN MAX UNIT PREP1 tw(CAP) Pulse Duration, CAP (asynchronous) 2P(1) + 2 ns PREP2 tw(SYNCI) Pulse Duration, SYNCI (asynchronous) 2P(1) + 2 ns (1) P = CORE_CLK period in ns. CAP PREP1 SYNCI PREP2 Figure 7-105. PRU_ICSSG ECAP Timing Table 7-127. PRU_ICSSG ECAP Switching Characteristics see Figure 7-106 NO. PARAMETER DESCRIPTION MIN MAX UNIT PREP3 tw(APWM) Pulse Duration, APWM high/low 2P(1) - 2 ns PREP4 tw(SYNCO) Pulse Duration, SYNCO (asynchronous) P(1) - 2 ns (1) P = CORE_CLK period in ns. AM6442, AM6441, AM6421, AM6412, AM6411 SPRSP56D – JANUARY 2021 – REVISED JULY 2022 www.ti.com 202 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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