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TL431IPG 数据表(PDF) 19 Page - ON Semiconductor |
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TL431IPG 数据表(HTML) 19 Page - ON Semiconductor |
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19 / 22 page ![]() SOIC−8 NB CASE 751−07 ISSUE AK DATE 16 FEB 2011 SEATING PLANE 1 4 5 8 N J X 45 _ K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A B S D H C 0.10 (0.004) SCALE 1:1 STYLES ON PAGE 2 DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G M Y M 0.25 (0.010) −Z− Y M 0.25 (0.010) Z S X S M __ __ XXXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package GENERIC MARKING DIAGRAM* 1 8 XXXXX ALYWX 1 8 IC Discrete XXXXXX AYWW G 1 8 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches SCALE 6:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* Discrete XXXXXX AYWW 1 8 (Pb−Free) XXXXX ALYWX G 1 8 IC (Pb−Free) XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 98ASB42564B DOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 SOIC−8 NB onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com |
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