VRD312 datasheet(99/416 Pages) MICROCHIP

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DS30010118D-page 99

PIC24FJ256GA705 FAMILY

TABLE 9-1:

CONFIGURATION BIT VALUES FOR CLOCK SELECTION

9.3

Control Registers

The operation of the oscillator is controlled by five

Special Function Registers:

• OSCCON

•CLKDIV

•OSCTUN

• OSCDIV

•OSCFDIV

The OSCCON register (Register 9-1) is the main con-

trol register for the oscillator. It controls clock source

switching and allows the monitoring of clock sources.

OSCCON is protected by a write lock to prevent

inadvertent clock switches. See Section 9.4 “Clock

Switching Operation” for more information.

The CLKDIV register (Register 9-2) controls the

features associated with Doze mode, as well as the

postscalers for the OSCFDIV Clock mode and the PLL

module.

The OSCTUN register (Register 9-3) allows the user to

fine-tune the FRC Oscillator over a range of

approximately ±1.5%.

The OSCDIV and OSCFDIV registers provide control

for the system oscillator frequency divider.

Oscillator Mode

Oscillator Source

POSCMD<1:0>

FNOSC<2:0>

Notes

Oscillator with Frequency Division

(OSCFDIV)

Internal/External

111

1, 2, 3

Low-Power RC Oscillator (LPRC)

Internal

101

Secondary (Timer1) Oscillator

(SOSC)

Secondary

100

Primary Oscillator (XT) with PLL

Module (XTPLL)

Primary

011

Primary Oscillator (EC) with PLL

Module (ECPLL)

Primary

011

Primary Oscillator (HS)

Primary

010

Primary Oscillator (XT)

Primary

010

Primary Oscillator (EC)

Primary

010

Fast RC Oscillator with PLL Module

(FRCPLL)

Internal

001

Fast RC Oscillator (FRC)

Internal

000

Note 1:

The input oscillator to the OSCFDIV Clock mode is determined by the RCDIV<2:0> (CLKDIV<10:8) bits.

At POR, the default value selects the FRC module.

This is the default Oscillator mode for an unprogrammed (erased) device.

OSCO pin function is determined by the OSCIOFCN Configuration bit.

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