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数据搜索系统，热门电子元器件搜索 |
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MPFS250TLS 数据表(PDF) 118 Page - Microchip Technology |
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MPFS250TLS 数据表(HTML) 118 Page - Microchip Technology |
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118 / 128 page  Condition Unit Max Typ Min Symbol Parameter ms 0 0 0 TTAMPER_READY The time from TFAB_READY to the tamper flags be- ing available ms 0 0 0 TCRYPTO_READY The time from TFAB_READY to the Athena Crypto co-processor being available (for S devices only) 1. Programming depends on the PUF to power up. Refer to TPUF_OVHD at section Secure NVM Performance. 6.10.8 I/O Calibration The following tables specify the initial I/O calibration time for the fastest and slowest supported VDDI ramp times of 0.2 ms to 50 ms, respectively. This only applies to I/O banks specified by the user to be auto-calibrated. Table 149 • I/O Initial Calibration Time (TCALIB) Condition Max (ms) Min (ms) Ramp Time Applies to HSIO and GPIO banks 2.63 0.98 0.2 ms Applies to HSIO and GPIO banks 62.19 41.62 50 ms Notes: • The user may specify any VDDI ramp time in the range specified above. The nominal initial calibration time is given by the specified VDDI ramp time plus 2 ms. • In order for IO calibration to start, VDDI and VDDAUX of the I/O bank must be higher than the trip point levels specified in I/O-Related Supplies. Table 150 • I/O Fast Recalibration Time (TRECALIB) Condition Max (ms) Typ (ms) Min (ms) I/O Type GPIO configured for 3.3 V operation 0.24 0.14 0.04 GPIO bank HSIO configured for 1.8 V operation 0.30 0.20 0.11 HSIO bank Note: In order to obtain fast re-calibration, the user must assert the relevant clock request signal from the FPGA fabric to the I/O bank controller. 6.11 Dedicated Pins The following section describes the dedicated pins. 114 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 AC Switching Characteristics |
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