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MPFS250TLS 数据表(PDF) 120 Page - Microchip Technology |
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MPFS250TLS 数据表(HTML) 120 Page - Microchip Technology |
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120 / 128 page  Table 152 • SPI Master Mode (PolarFire SoC Master) Condition Unit Max Typ Min Symbol Parameter During Program- ming MHz Mhz 20 40 sp1 SCK frequency During Initializa- tion ns SCK_period/2 sp2 SCK minimum pulse width high ns SCK_period/2 sp3 SCK minimum pulse width low Refer to PolarF- ire SoC IBIS models 3 ns sp4 sp5 Rise and fall time ns (SCK_period/2) – 3.0 sp6m SDO setup time ns (SCK_period/2) – 2.0 sp7m SDO hold time ns 10.0 sp8m SDI setup time ns –1.0 sp9m SDI hold time Notes: 1. Parameters are referenced to the active edge of SCK, which depends on the configured SPI protocol (for example, Motorola SPI mode uses rising edge as active edge if SPO= 0). 2. SDI is clocked into SPI on active edge and clocked out on inactive edge. Therefore, SDO delay parameters are dependent on SCK frequency (nominally SCK_period/2). 3. For specific rise/fall times, board design considerations, and detailed output buffer resistances, use the corresponding IBIS models located online at Microsemi SoC Products Group. Table 153 • SPI Slave Mode (PolarFire SoC Slave) Condition Unit Max Typ Min Symbol Parameter MHz 80 sp1 SCK frequency ns SCK_period/2 sp2 SCK minimum pulse width high ns SCK_period/2 sp3 SCK minimum pulse width low Refer to PolarF- ire SoC IBIS models 3 ns sp4 sp5 Rise and fall time ns (SCK_period/2) – 8.0 sp6s SDO setup time ns SCK_period/2 sp7s SDO hold time 116 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 AC Switching Characteristics |
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