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CC2430-RTR1-F32 数据表(PDF) 60 Page - Texas Instruments |
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CC2430-RTR1-F32 数据表(HTML) 60 Page - Texas Instruments |
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60 / 234 page  CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 60 of 232 IRCON2 (0xE8) – Interrupt Flags 5 Bit Name Reset R/W Description 7:5 - 00 R/W Not used WDTIF – Watchdog timer interrupt flag. 0 Interrupt not pending 4 WDTIF 0 R/W 1 Interrupt pending P1IF – Port 1 interrupt flag. 0 Interrupt not pending 3 P1IF 0 R/W 1 Interrupt pending UTX1IF – USART1 TX interrupt flag. 0 Interrupt not pending 2 UTX1IF 0 R/W 1 Interrupt pending UTX0IF – USART0 TX interrupt flag. 0 Interrupt not pending 1 UTX0IF 0 R/W 1 Interrupt pending P2IF – Port2 interrupt flag. 0 Interrupt not pending 0 P2IF 0 R/W 1 Interrupt pending 12.7.3 Interrupt Priority The interrupts are grouped into six interrupt priority groups and the priority for each group is set by the registers IP0 and IP1. In order to assign a higher priority to an interrupt, i.e. to its interrupt group, the corresponding bits in IP0 and IP1 must be set as shown in Table 30 on page 61. The interrupt priority groups with assigned interrupt sources are shown in Table 31. Each group is assigned one of four priority levels. While an interrupt service request is in progress, it cannot be interrupted by a lower or same level interrupt. In the case when interrupt requests of the same priority level are received simultaneously, the polling sequence shown in Table 32 is used to resolve the priority of each request. |
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