数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

CC2430-RTR1-F32 数据表(PDF) 83 Page - Texas Instruments

部件名 CC2430-RTR1-F32
功能描述  A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM
PDF  234 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

CC2430-RTR1-F32 数据表(HTML) 83 Page - Texas Instruments

Back Button CC2430-RTR1-F32 Datasheet HTML 79Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 80Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 81Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 82Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 83Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 84Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 85Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 86Page - Texas Instruments CC2430-RTR1-F32 Datasheet HTML 87Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 83 / 234 page
background image
CC2430
CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A
Page 83 of 232
P2INP (0xF7) – Port 2 Input Mode
Bit
Name
Reset
R/W
Description
Port 2 pull-up/down select. Selects function for all Port 2 pins
configured as pull-up/pull-down inputs.
0
Pull-up
7
PDUP2
0
R/W
1
Pull-down
Port 1 pull-up/down select. Selects function for all Port 1 pins
configured as pull-up/pull-down inputs.
0
Pull-up
6
PDUP1
0
R/W
1
Pull-down
Port 0 pull-up/down select. Selects function for all Port 0 pins
configured as pull-up/pull-down inputs.
0
Pull-up
5
PDUP0
0
R/W
1
Pull-down
P2_4 I/O input mode
0
Pull-up / pull-down
4
MDP2_4
0
R/W
1
Tristate
P2_3 I/O input mode
0
Pull-up / pull-down
3
MDP2_3
0
R/W
1
Tristate
P2_2 I/O input mode
0
Pull-up / pull-down
2
MDP2_2
0
R/W
1
Tristate
P2_1 I/O input mode
0
Pull-up / pull-down
1
MDP2_1
0
R/W
1
Tristate
P2_0 I/O input mode
0
Pull-up / pull-down
0
MDP2_0
0
R/W
1
Tristate
P0IFG (0x89) – Port 0 Interrupt Status Flag
Bit
Name
Reset
R/W
Description
7:0
P0IF[7:0]
0x00
R/W0
Port 0, inputs 7 to 0 interrupt status flags. When an input port pin
has an interrupt request pending, the corresponding flag bit will be
set.
P1IFG (0x8A) – Port 1 Interrupt Status Flag
Bit
Name
Reset
R/W
Description
7:0
P1IF[7:0]
0x00
R/W0
Port 1, inputs 7 to 0 interrupt status flags. When an input port pin
has an interrupt request pending, the corresponding flag bit will be
set.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com