CC1070-RTY1 datasheet(10/57 Pages) TI

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CC1070

SWRS043

Page 10 of 58

4.4 Digital Inputs / Outputs

Parameter

Min

Typ

Max

Unit

Condition / Note

Logic "0" input voltage

0.3*

VDD

Logic "1" input voltage

0.7*

VDD

Logic "0" output voltage

0.4

Output current −2.0 mA,

3.0 V supply voltage

Logic "1" output voltage

2.5

VDD

Output current 2.0 mA,

3.0 V supply voltage

Logic "0" input current

−1

µA

Input signal equals GND.

PSEL has an internal pull-up

resistor and during configuration

the current will be -350

µA.

Logic "1" input current

µA

Input signal equals VDD

DIO setup time

TX mode, minimum time DIO

must be ready before the positive

edge of DCLK. Data should be

set up on the negative edge of

DCLK.

DIO hold time

TX mode, minimum time DIO

must be held after the positive

edge of DCLK. Data should be

set up on the negative edge of

DCLK.

Serial interface (PCLK, PDI, PDO

and PSEL) timing specification

See Table 11 on page 20 for

more details

PA_EN pin drive

0.90

0.87

0.81

0.69

0.93

0.92

0.89

0.79

Source current

0 V on PA_EN pin

0.5 V on PA_EN pin

1.0 V on PA_EN pin

1.5 V on PA_EN pin

Sink current

3.0 V on PA_EN pin

2.5 V on PA_EN pin

2.0 V on PA_EN pin

1.5 V on PA_EN pin

Table 6. Digital inputs / outputs parameters

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