LPS22DF datasheet(21/54 Pages) STMICROELECTRONICS

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Digital interfaces

7.1

Serial interfaces

The registers embedded in the LPS22DF may be accessed through either the I²C, MIPI I3CSM or SPI serial

interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire interface mode.

The serial interfaces are mapped onto the same pins. To select/exploit the I²C interface, the CS line must be tied

high (i.e. connected to Vdd_IO).

Table 8. Serial interface pin description

Pin name

Pin description

Enables SPI

I²C and MIPI I3CSM / SPI mode selection

(1: SPI idle mode / I²C and MIPI I3CSM communication enabled;

0: SPI communication mode / I²C and MIPI I3CSM disabled)

SCL/SPC

I²C / MIPI I3CSM serial clock (SCL)

SPI serial port clock (SPC)

SDA

SDI

SDI/SDO

I²C / MIPI I3CSM serial data (SDA)

4-wire SPI serial data input (SDI)

3-wire serial data input/output (SDI/SDO)

SDO

SAO

4-wire SPI serial data output (SDO)

I²C least significant bit of the device address (SA0)

MIPI I3CSM least significant bit of the static address (SA0)

7.2

I²C serial interface (CS = high)

The LPS22DF I²C is a bus slave. The I²C is employed to write data into registers whose content can also be read

back.

The relevant I²C terminology is given in the following table.

Table 9. I²C terminology

Term

Description

Transmitter

The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals and terminates a transfer

Slave

The device addressed by the master

There are two signals associated with the I²C bus: the serial clock line (SCL) and the serial data line (SDA). The

latter is a bidirectional line used for sending and receiving the data to/from the interface. Both lines have to be

connected to Vdd_IO through pull-up resistors.

The I²C interface is compliant with fast mode+ (1 MHz) I²C standards as well as with the normal mode.

LPS22DF

Digital interfaces

DS13316 - Rev 1

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