L9960T datasheet(30/95 Pages) STMICROELECTRONICS

30 / 95 page

Functional description

L9960, L9960T

30/95

DS11115 Rev 10

4.4

Hardware self check (HWSC) and LBIST

The target of the hardware self check is to check the proper function of the VDD5 over

voltage detection. Due to the fact that over voltage is impossible in a proper working ECU, it

is necessary to simulate an over voltage situation, by changing the over voltage threshold

during HWSC/LBIST test.

The target of the LBIST is to cover the disable path of the device, for safety aspects.

As long as the HWSC/LBIST has not been performed (indicated by the signal

HWSC/LBIST_done = "0") the bridge outputs remain disabled in tri-state.

The start condition for the HWSC/LBIST is triggered by a SPI bit “HWSC/LBIST Trigger”. It

is considered as a valid command only after a POR or a SW reset or a failed HWSC/BIST. If

passed, it cannot be triggered again and the SPI answer remains the same.

HWSC/LBIST can be re-triggered only in case of FAIL result, or SW reset.

Note:

(-) available in the D8 position in SPI command frame 2, please refer to Application Note for

MISO response in case of SW reset and for HWSC trigger.

4.4.1

HWSC test procedure

Once the HWSC is started, the reference voltage of the VDD5 over-voltage comparator is

reduced to the lower value "VDD5_ov_hwsc", by the signal o_VDD5_ov_ref, as shown in

the Figure 12 below.

At the same time, the filters “Thwsc_fil”, “Thwsc_ref” and “Thwsc_dur” are started.

"Thwsc_dur" indicates the duration of the LBIST test.

"Thwsc_dur" indicates the duration of the dynamical adjustment of the VDD overvoltage

threshold.

In case the VDD5 over-voltage comparator indicates an over voltage condition when the

filter time “Thwsc_fil” has expired the HWSC status bits indicate that the test has

successfully passed.

In case the VDD5 over-voltage indicates no over voltage condition when the filter time

“Thwsc_fil” has expired the HWSC status bits are set to indicate that the test has failed.

In case the filter time Thwsc_fil is not yet fully expired at the end of “Thwsc_ref” (e.g. due

to several restarts of “Thwsc_fil”) the HWSC status bits are set to indicate that the test has

failed.

After “Thwsc_ref” has expired, the reduced VDD5 over-voltage comparator reference

voltage returns back to the VDD5 over voltage disable threshold “Vdd_ov_th”.

tHWSC is re-triggered with every transition of the VDD5 OV comparator from "0" to "1"

In Figure 12 "o_VDD5_ov_ref" is an internal signal which controls the reduction of the

VDD5 over voltage threshold.

Table 30. HWSC/LBIST Trigger

Bit status

Description

Condition

HWSC/LBIST not requested

Reset value

request for HWSC/LBIST

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