Pin description

STA8100GA

8/42

DS13006 Rev 4

STANDBY_IN(2)

VBK_IN /

IO ring0

I

When low, the chip is forced in Standby mode.

F4

Hi-Z

STANDBY_OUT VBK_IN

O

When low, it indicates device is in Standby mode.

D9

Hi-Z

1.

In Standby mode, if VIO1 and VIO2 are powered, GPIOs have no driving capabilities and no PD/PU is active.

2.

If VCORE_IN is removed before STANDBY_IN has switched from high to low, STANDBY_OUT remains high level, even if

device enters in Standby mode.

Table 2. Main function pins (continued)

Symbol

I/O voltage(1)

I/O

Description

Ball

Reset state

Table 3. RF front-end pins

Symbol

I/O voltage

I/O

Description

Ball

ANTSens2/ AIN1

IO ring RF

I

Antenna sensing – TPIF_P

H5

ANTSens1/ AIN0

IO ring RF

I

Antenna sensing – TPIF_N

H4

LNA_IN

LNA VCC

I

LNA input

H1

LNA_OUT

LNA VCC

O

LNA output

J2

RFA_IN

VRFOUT

I

RFA input

J3

TCXO_IN

PLL VCC

I

TCXO input

F1

Table 4. Memory interface (power fail safe IOs)

Symbol

I/O voltage

I/O

Description

Ball

Reset state

SFC_CLK

IO ring1

O

Serial flash controller clock

B1

Hi-Z/ PD

SFC_CSN

IO ring1

O

Serial flash controller chip select

A2

Hi-Z/ PD

SFC_SIO0

IO ring1

I/O

Serial flash controller data IO 0

D4

Hi-Z/ PD

SFC_SIO1

IO ring1

I/O

Serial flash controller data IO 1

C4

Hi-Z/ PD

SFC_SIO2

IO ring1

I/O

Serial flash controller data IO 2

B3

Hi-Z/ PD

SFC_SIO3

IO ring1

I/O

Serial flash controller data IO 3

C3

Hi-Z/ PD

SFC_SIO4

IO ring1

I/O

Serial flash controller data IO 4

D3

Hi-Z/ PD

SFC_SIO5

IO ring1

I/O

Serial flash controller data IO 5

B2

Hi-Z/ PD

SFC_SIO6

IO ring1

I/O

Serial flash controller data IO 6

C2

Hi-Z/ PD

SFC_SIO7

IO ring1

I/O

Serial flash controller data IO 7

D2

Hi-Z/ PD

Table 5. External RF interface (power fail safe IOs)

Symbol

I/O voltage(1)

I/O

Description

Ball

ISIG1

IO ring1 (FS)

I

Ex RF interface I-Sign1

C6

IMAG1

IO ring1 (FS)

I

Ex RF interface I-Mag1

B4

QSIG1

IO ring1 (FS)

I

Ex RF interface Q-Sign1

D6

QMAG1

IO ring1 (FS)

I

Ex RF interface Q-Mag1

A4

ISIG2

IO ring1 (FS)

I

Ex RF interface I-Sign2

D5