STA8100GA datasheet(30/42 Pages) STMICROELECTRONICS

部件名	STA8100GA

功能描述	Teseo V family automotive multi-band multi-constellation GNSS precise engine receiver

PDF	42 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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30 / 42 page

Electrical specifications

STA8100GA

30/42

DS13006 Rev 4

4.6

Digital interface AC timing characteristics (specified by

design)

Figure 7. Clock block diagram

4.6.1

SQIO

Table 25. Power up timing data

Symbol

Condition

Min.

Max.

Unit

Comment

tVCORE_IN_On

VBK_IN>1.7 V

Simultaneous power on of VBKIN and

VCORE_IN/VDD_EXT_REG

tVSupply_On

VBK_IN>1.7 V

Simultaneous power on of VBKIN and

other supplies is allowed

tRESETn

VBK_IN>1.7 V

—

tRiOscRESETn

VCORE_IN>1.7 V

VDD_EXT_REG>1.15 V

0.5

—

tRiOscVCOREIN_On

RESETn = high

0.5

—

Table 26. Clock data

Symbol

Comment

CLK period

Clock time period

tOdly

Output data delay from rising clock edge, unless differently specified

tIS

Input data setup time to rising clock edge, unless differently specified

tIH

Input data hold time from rising clock edge, unless differently specified

Table 27. SQIO SDR mode (feedback mode)

Type

Symbol

Min.

Max.

Unit

Cload

Notes

Clock

CLK freq.

—

78.5

MHz

25 pF

—

CLK period

12.74

—

CLK duty cycle

—

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