LSM6DSTTR datasheet(78/180 Pages) STMICROELECTRONICS

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LSM6DST

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DocID033525 Rev 2

9.10

INT2_CTRL (0Eh)

INT2 pin control register (r/w)

Each bit in this register enables a signal to be carried over INT2 when the MIPI I3CSM

dynamic address in not assigned (I²C or SPI is used). Some bits can be also used to trigger

an IBI when the I3C interface is used. The output of the pin will be the OR combination of

the signals selected here and in MD2_CFG (5Fh).

Table 42. INT2_CTRL register description

9.11

WHO_AM_I (0Fh)

WHO_AM_I register (r). This is a read-only register. Its value is fixed at 6Dh.

Table 41. INT2_CTRL register

0(1)

1. This bit must be set to '0' for the correct operation of the device.

INT2_CNT

_BDR

INT2_

FIFO_

FULL

INT2_

FIFO_

OVR

INT2_

FIFO_TH

INT2_DRDY

_TEMP

INT2_

DRDY_G

INT2_

DRDY_XL

INT2_CNT_BDR

Enables COUNTER_BDR_IA interrupt on INT2

INT2_FIFO_FULL

Enables FIFO full flag interrupt on INT2 pin

INT2_FIFO_OVR

Enables FIFO overrun interrupt on INT2 pin

INT_FIFO_TH

Enables FIFO threshold interrupt on INT2 pin

INT2_DRDY_TEMP

Enables temperature sensor data-ready interrupt on INT2 pin. It

can be also used to trigger an IBI when the MIPI I3CSM interface is used and

INT2_ON_INT1 = ‘1’ in CTRL4_C (13h).

INT2_DRDY_G

Gyroscope data-ready interrupt on INT2 pin

INT2_DRDY_XL

Accelerometer data-ready interrupt on INT2 pin

Table 43. WhoAmI register

01101101

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