6

ICS950813

Advance Information

0708—10/10/02

Pin #

Name

0

1

PWD

Bit 7

-

Spread Enabled

Spread Spectrum Control

RW

OFF

ON

0

Bit 6

-

CPUCLKT(2:0)

Power down mode output level

0= CPU driven in power down

1= undriven

RW

HIGH

LOW

0

Bit 5

35

3V66_1/VCH_CLK/FS3**

VCH/66.66 Select

RW

66.66

48.00

0

Bit 4

53

CPU_STOP#*

Reflects value of pin

R

Stop

Active

X

Bit 3

34

PCI_STOP#*

Reflects value of pin at power up.

Also can be set.

RW

Stop

Active

X

Bit 2

39

FS3

Frequency Selection

RW

-

-

X

Bit 1

55

FS1

Frequency Selection

R

-

-

X

Bit 0

54

FS0

Frequency Selection

R

-

-

X

Note:

Pin #

Name

0

1

PWD

Bit 7

43

MULTSEL*

Reflects value of pin

R

-

-

x

Bit 6

-

CPUCLKT(2:0)

CPU_Stop mode output level

0= CPU driven when stopped

1 = undriven

RW

HIGH

LOW

0

Bit 5

45, 44

CPUCLKT2, CPUCLKC2

(see note)

Allow control of output with

assertion of CPU_STOP#.

RW

Not

Freerun

Freerun

0

Bit 4

49, 48

CPUCLKT1, CPUCLKC1

(see note)

Allow control of output with

assertion of CPU_STOP#.

RW

Not

Freerun

Freerun

0

Bit 3

52, 51

CPUCLKT0, CPUCLKC0

(see note)

Allow control of output with

assertion of CPU_STOP#.

RW

Not

Freerun

Freerun

0

Bit 2

45, 44

CPUCLKT2, CPUCLKC2

Output control

RW

Disable

Enable

1

Bit 1

49, 48

CPUCLKT1, CPUCLKC1

Output control

RW

Disable

Enable

1

Bit 0

52, 51

CPUCLKT0, CPUCLKC0

Output control

RW

Disable

Enable

1

Note:

Pin #

Name

0

1

PWD

Bit 7

56

REF

1X or 2X Strength control

RW

1X

2X

0

Bit 6

18

PCICLK6

Output control

RW

Disable

Enable

1

Bit 5

17

PCICLK5

Output control

RW

Disable

Enable

1

Bit 4

16

PCICLK4

Output control

RW

Disable

Enable

1

Bit 3

13

**E_PCICLK3/PCICLK3

Output control

RW

Disable

Enable

1

Bit 2

12

PCICLK2

Output control

RW

Disable

Enable

1

Bit 1

11

**E_PCICLK1/PCICLK1

Output control

RW

Disable

Enable

1

Bit 0

10

PCICLK0

Output control

RW

Disable

Enable

1

Note:

CPUCLK(2:0) can be turned on/off by CPU_STOP#. Refer to table 4.

PCICLK(6:0) can be turned on/off by PCI_STOP#. Refer to table 3.

Affected Pin

Type

Control Function

Bit Control

BYTE

0

BYTE

1

BYTE

2

For PCI_STOP# function, refer to table 3.

Type

Bit Control

Type

Control Function

Affected Pin

Bit Control

Control Function

Affected Pin