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DFE201612E-R33M 数据表(PDF) 23 Page - Kinetic Technologies. |
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DFE201612E-R33M 数据表(HTML) 23 Page - Kinetic Technologies. |
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23 / 25 page ![]() KTB8331 December 2021 – Revision 04b Page 23 of 25 Kinetic Confidential impact on DC bias derating. At high VOUT settings, more total nominal capacitance is needed to achieve the same effective capacitance compared to lower VOUT settings. For the very best possible load transient response, use multiple capacitors in parallel to achieve sufficient total effective output capacitance: ������������������������ ������������������������������������������������������ ≥ ������ × ������������������������������ 33������Ω × (������������������ − ������������������������) where ISTEP is the largest load transient step in the application. Please note that the above formula is already guard-banded by a margin of 2x to accommodate capacitor and inductor tolerances and the variability of a transient arrival time with respect to the switching cycle of the regulator. If needed, the total effective output capacitance can be distributed by placing additional capacitors remotely at the point of load. In applications where transient performance is less critical, especially when VIN minus VOUT is small, it is acceptable to reduce the total effective output capacitance to save board space and cost at the expense of load transient droop and soar. As a design example, consider a system with VIN = 3.2V (min), VOUT = 1.8V, and ISTEP = 2A (max): ������������������������ ������������������������������������������������������ ≥ 330������������ × 2������ 33������Ω × (3.2������ − 1.8������) ≅ 14������������ In this example, choose output capacitors with total effective capacitance of 14µF or more at a DC bias of 1.8V. A single 15µF capacitor will not be enough when considering its DC bias characteristic, per Figure 5. At 1.8V bias, it retains only about 8µF; therefore, for best transient response, use two of these capacitors in parallel for a total effective capacitance of 16µF. Figure 5. Typical DC bias derating characteristic for example 15µF ceramic capacitor. When operating near dropout with high VOUT and low VIN (for example 3.3VOUT and 3.6VIN), add additional bulk capacitance to COUT to reduce VOUT droop and ringing during load transient events that is inherent in buck regulators operating at high duty-cycle. |
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