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STBC15 数据表(PDF) 6 Page - STMicroelectronics

部件名 STBC15
功能描述  Ultra-low current consumption linear battery charger
PDF  23 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STBC15 数据表(HTML) 6 Page - STMicroelectronics

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Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VBAT_OVD
Battery over discharge
disconnection threshold
STBC15, VCHGIN = 0 V, IOUT = 0 A,
PKM = 0 (peak mode disabled)
3.15
3.25
3.3
V
STBC15,
VCHGIN = 0 V, IOUT = 0 A,
PKM=1 (peak mode enabled)
2.15
2.25
2.3
STBC15L, VCHGIN = 0 V, IOUT = 0 A,
PKM = 0 or 1
2.60
2.7
2.75
VBAT_FF
Battery disconnected FF
retention voltage
VCHGIN = 0 V,
VBAT < VBAT_OVD
1.8
V
VBAT_CONN
Battery connected threshold –
rising
STBC15,
VCHGIN = 0 V, IOUT = 0 A,
PKM = 0 or 1
3.98
4.1
4.22
V
STBC15L,
VCHGIN = 0 V, IOUT = 0 A,
PKM = 0 (peak mode disabled)
3.6
V
STBC15L,
VCHGIN = 0 V, IOUT = 0 A,
PKM=1 (peak mode enabled)
3.9
V
VBAT_CONN _H
Battery connected threshold
hysteresis
100
mV
VBAT_ASD
Battery ASD threshold
VCHGIN-VBAT
50
mV
VBAT_RECHG
Battery recharge threshold
VBAT -VCHGIN
170
mV
RIN_BAT
Input-to-battery
on-resistance
6
10
Ω
RDSON_M3
M3 transistor on-resistance
3
Ω
RIN_SM
Input shelf mode
pull-down resistor
SM pin vs. GND
100
kΩ
IIN_PKM
PKM input current leakage
0.1
nA
IIN_SET
VSET0,1, ISET0,1 input current
leakage
0.1
nA
VIL
Logic low input level (VSET0,1,
ISET0,1)
To see threshold plot in full temperature
range
0.4
V
VIH
Logic high input level
(VSET0,1, ISET0,1)
1.6
VCHGIN
V
VIL2
Logic low input level
(SM, PKM)
0.4
V
VIH2
Logic high input level
(SM, PKM)
VBAT = 3.6 V
1.8
VOUT
V
VBAT = 4.2 V
2.0
VOUT
VOLPG
PG output logic level
IOL = 1 mA
0.4
V
IOHPG
PG output current leakage
VOH = 3.3 V
0.2
µA
VOL-CHGIN_OK
CHGINOK, output logic level
IOL = 1 mA
0.4
V
STBC15
Electrical characteristics
DS12551 - Rev 1
page 6/23



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