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ICS8745B 数据表(PDF) 3 Page - Integrated Circuit Systems |
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ICS8745B 数据表(HTML) 3 Page - Integrated Circuit Systems |
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3 / 15 page ![]() 8745BY www.icst.com/products/hiperclocks.html REV. B DECEMBER 2, 2004 3 Integrated Circuit Systems, Inc. ICS8745B 1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR TABLE 3A. CONTROL INPUT FUNCTION TABLE s t u p n I s t u p t u O 1 = L E S _ L L P e d o M e l b a n E L L P 3 L E S2 L E S1 L E S0 L E S* ) z H M ( e g n a R y c n e u q e r F e c n e r e f e R4 Q n : 0 Q n , 4 Q : 0 Q 00 0 0 0 0 7 - 0 5 21 ÷ 00 0 1 0 5 3 - 5 2 11 ÷ 00 1 0 5 7 1 - 5 . 2 61 ÷ 00 1 1 5 . 7 8 - 5 2 . 1 31 ÷ 01 0 0 0 0 7 - 0 5 22 ÷ 01 0 1 0 5 3 - 5 2 12 ÷ 01 1 0 5 7 1 - 5 . 2 62 ÷ 01 1 1 0 0 7 - 0 5 24 ÷ 10 0 0 0 5 3 - 5 2 14 ÷ 10 0 1 0 0 7 - 0 5 28 ÷ 10 1 0 0 5 3 - 5 2 12 x 10 1 1 5 7 1 - 5 . 2 62 x 11 0 0 5 . 7 8 - 5 2 . 1 32 x 11 0 1 5 7 1 - 5 . 2 64 x 11 1 0 5 . 7 8 - 5 2 . 1 34 x 11 1 1 5 . 7 8 - 5 2 . 1 38 x . z H M 0 0 7 o t z H M 0 5 2 s i e v o b a s n o i t a r u g i f n o c ll a r o f e g n a r y c n e u q e r f O C V : E T O N * TABLE 3B. PLL BYPASS FUNCTION TABLE s t u p n I s t u p t u O 0 = L E S _ L L P e d o M s s a p y B L L P 3 L E S2 L E S1 L E S0 L E S4 Q n : 0 Q n , 4 Q : 0 Q 00 0 0 4 ÷ 00 0 1 4 ÷ 00 10 4 ÷ 00 1 1 8 ÷ 01 00 8 ÷ 01 0 1 8 ÷ 01 1 0 6 1 ÷ 01 11 6 1 ÷ 10 0 0 2 3 ÷ 10 0 1 4 6 ÷ 10 1 0 2 ÷ 10 1 1 2 ÷ 11 0 0 4 ÷ 11 0 1 1 ÷ 11 10 2 ÷ 11 1 1 1 ÷ |
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