数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

STMPE812 数据表(PDF) 39 Page - STMicroelectronics

部件名 STMPE812
功能描述  S-Touch® enhanced 4-wire resistive touchscreen controller with PWM
PDF  51 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STMPE812 数据表(HTML) 39 Page - STMicroelectronics

Back Button STMPE812 Datasheet HTML 35Page - STMicroelectronics STMPE812 Datasheet HTML 36Page - STMicroelectronics STMPE812 Datasheet HTML 37Page - STMicroelectronics STMPE812 Datasheet HTML 38Page - STMicroelectronics STMPE812 Datasheet HTML 39Page - STMicroelectronics STMPE812 Datasheet HTML 40Page - STMicroelectronics STMPE812 Datasheet HTML 41Page - STMicroelectronics STMPE812 Datasheet HTML 42Page - STMicroelectronics STMPE812 Datasheet HTML 43Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 51 page
background image
STMPE812
GPIO port controller
Doc ID 17732 Rev 3
39/51
12
GPIO port controller
A total of 4/6 configurable ports are available in the STMPE812 port expander device.
If configured as GPIO input/output, they are controlled by the GPIO registers.
All GPIO registers are named as GPxx, where:
Xxx represents the functional group
The function of each bit is shown in Table 15:
If both GPFE and GPRE are not set, state transition on a GPIO does not cause an interrupt.
On power-up reset, all GPIO are set as input.
Table 14.
GPIO registers
Address
Register
Bit
Type
Reset
Function
0x10
GPIO_SET_PIN
8
R/W
0x00
Set pin state
0x11
GPIO_CLR_PIN
8
R/W
0x00
Clear pin state
0x12
GPIO_MP_STA
8
R/W
0x00
Monitor pin state
0x13
GPIO_DIR
8
R/W
0x00
Falling edge
detection enable
0x14
GPIO_ED
8
R/W
0x00
Rising edge
detection enable
Bit
7
65432
10
GPxx
IO-3
IO-2
IO-1
IO-0
Table 15.
GPIO registers
Register name
Function
GPIO monitor pin state
Reading this bit yields the current state of the bit. Writing has no effect.
GPIO set pin state
Writing ‘1’ to this bit causes the corresponding GPIO to go to ‘1’ state.
Writing ‘0’ to this bit has no effect
Reading this register always yield 0x00
GPIO clear pin state
Writing ‘1’ to this bit causes the corresponding GPIO to go to ‘0’ state.
Writing ‘0’ to this bit has no effect
Reading this register always yield 0x00
GPIO falling edge detection
enable
Writing ‘1’ to this bit allows interrupt generation when there is a falling
edge at the corresponding GPIO
Writing ‘0’ disables the interrupt generation on falling edge detection
GPIO rising edge detection
enable
Writing ‘1’ to this bit allows interrupt generation when there is a rising
edge at the corresponding GPIO
Writing ‘0’ disables the interrupt generation on rising edge detection
Obsolete
Product(s)
- Obsolete
Product(s)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com